Renesas R5S72621 User Manual

Page of 2152
 
Section 23   CD-ROM Decoder 
Page 1256 of 2108 
 
R01UH0134EJ0400  Rev. 4.00 
 
 Sep 
24, 
2014 
SH7262 Group, SH7264 Group
23.5.2
 
Timing of Status Registers Updates 
The status information registers of the CD-ROM decoder are updated on each ISEC interrupt. The 
sector for which information is reflected in the status registers is selected by the ER0SEL bit of the 
CROMCTL4 register. 
23.6
 
Usage Notes 
23.6.1
 
Stopping and Resuming Buffering Alone during Decoding 
When the data of the output stream are being not read out but operation of the CD-ROM decoder 
has continued until the buffers are full, the BUF_NG bit in the CBUFST2 register is set to 1; after 
that, the CD-ROM decoder becomes incapable of operation. 
To stop buffering alone, clear the CBUF_EN bit in the CBUFCTL0 register to 0. If the automatic 
buffering function is in use, clear the CBUF_AUT in the CBUFCTL0 register to 0 at the same 
time. In this case, the sectors currently in the buffers must be read out. 
To resume automatic buffering, set the CBUF_AUT and CBUF_EN bits in the CBUFCTL0 
register at the same time. 
23.6.2
 
When CROMST0 Status Register Bits are Set 
1.  When the ST_SECS bit in the CROMST0 register becomes set, stop decoding immediately 
and retry from one sector before the sector that was being decoded. 
2.  When the ST_SECL bit in the CROMST0 register becomes set, stop decoding immediately 
and retry from two sectors before the sector that was being decoded.