Renesas R5S72621 User Manual
Section 27 Video Display Controller 3
Page 1580 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
27.7.5
Vertical Valid Video Start Position Register (VIDEO_VSTART)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
1
0
0
0
1
0
1
1
1
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
-
-
-
-
-
-
-
VIDEO_VSTART_TOP[8:0]
VIDEO_VSTART_BTM[8:0]
-
-
-
-
-
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
31 to 25
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
24 to 16
VIDEO_VSTART
_TOP[8:0]
_TOP[8:0]
H'010
R/W
These bits specify in number of lines the vertical
start position of the valid video in the TOP field.
Setting to H'000 is prohibited.
start position of the valid video in the TOP field.
Setting to H'000 is prohibited.
15 to 9
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
8 to 0
VIDEO_VSTART
_BTM[8:0]
_BTM[8:0]
H'117
R/W
These bits specify in number of lines the vertical
start position of the valid video in the BOTTOM
field.
start position of the valid video in the BOTTOM
field.