Renesas R5S72621 User Manual
Section 37 Electrical Characteristics
R01UH0134EJ0400 Rev. 4.00
Page 1979 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
37.4.2
Control Signal Timing
Table 37.6 Control Signal Timing
B
= 72 MHz
Item Symbol Min.
Max.
Unit
Figure
RES pulse width Exit from standby mode t
RESW
10
ms
Figure
37.7
(1)
Other than above
20
t
cyc
TRST pulse width
t
TRSW
20
t
cyc
NMI pulse width Exit from standby mode t
NMIW
10
ms
Figure
37.7
(2)
Other than above
20
t
cyc
IRQ pulse width Exit from standby mode t
IRQW
10
ms
Other than above
20
t
cyc
PINT pulse width
t
PINTW
20
t
cyc
BREQ setup time
t
BREQS
1/2t
cyc
+ 7
ns
Figure
37.8
BREQ hold time
t
BREQH
1/2t
cyc
+ 2
ns
BACK delay time
t
BACKD
1/2t
cyc
+ 13
ns
Bus buffer off time 1
t
BOFF1
15 ns
Bus buffer off time 2
t
BOFF2
15 ns
Bus buffer on time 1
t
BON1
15 ns
Bus buffer on time 2
t
BON2
15 ns
BACK setup time before the bus buffer off
timing
timing
t
BACKS
0
ns
t
RESW
/t
TRSW
RES
TRST
Figure 37.7 (1) Reset Input Timing