Renesas R5S72621 User Manual
Section 7 Interrupt Controller
R01UH0134EJ0400 Rev. 4.00
Page 167 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
7.3.4
Interrupt Control Register 2 (ICR2)
ICR2 is a 16-bit register that specifies the detection mode for external interrupt input pins PINT7
to PINT0 individually: low level or high level.
to PINT0 individually: low level or high level.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
-
-
-
-
-
-
-
-
PINT7S PINT6S PINT5S PINT4S PINT3S PINT2S PINT1S PINT0S
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
15 to 8
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
7
PINT7S
0
R/W
PINT Sense Select
These bits select whether interrupt signals
corresponding to pins PINT7 to PINT0 are detected by
a low level or high level.
corresponding to pins PINT7 to PINT0 are detected by
a low level or high level.
0: Interrupt request is detected on low level of PINTn
input
1: Interrupt request is detected on high level of PINTn
input
6 PINT6S
0 R/W
5 PINT5S
0 R/W
4 PINT4S
0 R/W
3 PINT3S
0 R/W
2 PINT2S
0 R/W
1 PINT1S
0 R/W
0 PINT0S
0 R/W
[Legend]
n = 7 to 0