Renesas R5S72621 User Manual

 
Section 7   Interrupt Controller 
 

Page 206 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

Interrupt request signals can be used to activate the direct memory access controller and transfer 
data. 

Interrupt sources that are designated to activate the direct memory access controller are masked 
without being input to the interrupt controller. The mask condition is as follows: 

Mask condition = DME 

 (DE0  interrupt source select 0 + DE1  interrupt source select 1 

+ DE2 

 interrupt source select 2 + DE3  interrupt source select 3 + 

DE4 

 interrupt source select 4 + DE5  interrupt source select 5 + DE6 

 interrupt source select 6 + DE7  interrupt source select 7 + DE8  
interrupt source select 8 + DE9 

 interrupt source select 9 + DE10  

interrupt source select 10 + DE11 

 interrupt source select 11 + DE12  

interrupt source select 12 + DE13 

 interrupt source select 13 + DE14  

interrupt source select 14 + DE15 

 interrupt source select 15) 

Figure 7.13 shows a block diagram of interrupt control. 

Here, DME is bit 0 in DMAOR of the direct memory access controller, and DEn (n = 0 to 15) is 
bit 0 in CHCR_0 to CHCR_15 of the direct memory access controller. For details, see section 10, 
Direct Memory Access Controller. 

Direct memory 

access 

controller

Interrupt

controller

CPU

CPU interrupt request

Interrupt source

Interrupt source (not specified as a direct memory access controller activating source)

Interrupt source 
flag clearing
(by the direct memory
access controller)