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Renesas R5S72621 User Manual

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Section 7   Interrupt Controller 
 
R01UH0134EJ0400  Rev. 4.00  
 
Page 207 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
7.9.1
 
Handling Interrupt Request Signals as Sources for CPU Interrupt but Not Direct 
Memory Access Controller Activating 
1  Do not select direct memory access controller activating sources or clear the DME bit to 0. If, 
direct memory access controller activating sources are selected, clear the DE bit to 0 for the 
relevant channel of the direct memory access controller. 
2.  When interrupts occur, interrupt requests are sent to the CPU. 
3.  The CPU clears the interrupt source and performs the necessary processing in the interrupt 
exception service routine. 
 
7.9.2
 
Handling Interrupt Request Signals as Sources for Activating Direct Memory 
Access Controller but Not CPU Interrupt 
1.  Select direct memory access controller activating sources and set both the DE and DME bits to 
1. This masks CPU interrupt sources regardless of the interrupt priority register settings. 
2.  Activating sources are applied to the direct memory access controller when interrupts occur. 
3.  The direct memory access controller clears the interrupt sources when starting transfer.