Renesas R5S72621 User Manual
Section 11 Multi-Function Timer Pulse Unit 2
Page 504 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
11.3.28
Timer Dead Time Enable Register (TDER)
TDER is an 8-bit readable/writable register that controls dead time generation in complementary
PWM mode. This module has one TDER in channel 3. TDER must be modified only while TCNT
stops.
PWM mode. This module has one TDER in channel 3. TDER must be modified only while TCNT
stops.
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
1
R
R
R
R
R
R
R
R/(W)
-
-
-
-
-
-
-
TDER
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7 to 1
All
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
always be 0.
0
TDER
1
R/(W)
Dead Time Enable
Specifies whether to generate dead time.
0: Does not generate dead time
1: Generates dead time*
[Clearing condition]
When 0 is written to TDER after reading TDER = 1
Note: * TDDR must be set to 1 or a larger value.