Renesas R5S72621 User Manual
Section 11 Multi-Function Timer Pulse Unit 2
R01UH0134EJ0400 Rev. 4.00
Page 599 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
11.7.3
Caution on Period Setting
When counter clearing on compare match is set, TCNT is cleared in the final state in which it
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
f =
P
(N + 1)
Where f: Counter
frequency
P
:
Peripheral clock operating frequency
N:
TGR set value
11.7.4
Contention between TCNT Write and Clear Operations
If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing takes
precedence and the TCNT write is not performed.
precedence and the TCNT write is not performed.
Figure 11.99 shows the timing in this case.
Counter clear
signal
signal
Write signal
Address
TCNT address
TCNT
TCNT write cycle
T1
T2
N
H'0000
P
φ
Figure 11.99 Contention between TCNT Write and Clear Operations