Renesas R5S72621 User Manual
Section 15 Serial Communication Interface with FIFO
Page 716 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
15.3.3
Transmit Shift Register (SCTSR)
SCTSR transmits serial data. Transmit data is loaded from the transmit FIFO data register
(SCFTDR) into SCTSR, then the data is transmitted serially from the TxD pin, LSB (bit 0) first.
After one data byte has been transmitted, the next transmit data is automatically loaded from
SCFTDR into SCTSR and transmission is started again.
(SCFTDR) into SCTSR, then the data is transmitted serially from the TxD pin, LSB (bit 0) first.
After one data byte has been transmitted, the next transmit data is automatically loaded from
SCFTDR into SCTSR and transmission is started again.
The CPU cannot read from or write to SCTSR directly.
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit:
Initial value:
R/W:
15.3.4
Transmit FIFO Data Register (SCFTDR)
SCFTDR is a 16-byte FIFO register that stores data for serial transmission. When the transmit
shift register (SCTSR) empty is detected, transmit data written in the SCFTDR is moved to
SCTSR and serial transmission is started. Continuous serial transmission is performed until there
is no transmit data left in SCFTDR. The CPU can write to SCFTDR at all times.
shift register (SCTSR) empty is detected, transmit data written in the SCFTDR is moved to
SCTSR and serial transmission is started. Continuous serial transmission is performed until there
is no transmit data left in SCFTDR. The CPU can write to SCFTDR at all times.
When SCFTDR is full of transmit data (16 bytes), no more data can be written. If writing of new
data is attempted, the data is ignored.
data is attempted, the data is ignored.
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
W
W
W
W
W
W
W
W
Bit:
Initial value:
R/W: