Renesas R5S72621 User Manual
Section 16 Renesas Serial Peripheral Interface
R01UH0134EJ0400 Rev. 4.00
Page 799 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
16.3.12
Next-Access Delay Register (SPND)
SPND sets a non-active period (next-access delay) after termination of a serial transfer when the
SPNDEN bit in the command register (SPCMD) is 1. If the contents of SPND are changed while
the MSTR and SPE bits in the control register (SPCR) are 1 with the function of this module
enabled in master mode, the subsequent operation cannot be guaranteed.
SPNDEN bit in the command register (SPCMD) is 1. If the contents of SPND are changed while
the MSTR and SPE bits in the control register (SPCR) are 1 with the function of this module
enabled in master mode, the subsequent operation cannot be guaranteed.
When using this module in slave mode, set B'000 to SPNDL2 to SPNDL0.
7
6
5
4
3
2
1
0
Bit:
Initial value:
R/W:
0
0
0
0
0
0
0
0
R
R
R
R
R
R/W
R/W
R/W
⎯
⎯
⎯
⎯
⎯
SPN
DL2
SPN
DL1
SPN
DL0
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
7 to 3
All
0
R
Reserved
The write value should always be 0. Otherwise,
operation cannot be guaranteed.
operation cannot be guaranteed.
2
1
0
SPNDL2
SPNDL1
SPNDL0
0
0
0
R/W
R/W
R/W
Next-Access Delay Setting
These bits set a next-access delay when the
SPNDEN bit in SPCMD is 1.
SPNDEN bit in SPCMD is 1.
The relationship between the setting of SPNDL2 to
SPNDL0 and the next-access delay value is shown
below.
SPNDL0 and the next-access delay value is shown
below.
000: 1 RSPCK
2 B
001: 2 RSPCK
2 B
010: 3 RSPCK
2 B
011: 4 RSPCK
2 B
100: 5 RSPCK
2 B
101: 6 RSPCK
2 B
110: 7 RSPCK
2 B
111: 8 RSPCK
2 B