IBM Intel Xeon E5504 46D1351 User Manual
Product codes
46D1351
Register Description
56
Intel® Xeon® Processor 5500 Series Datasheet, Volume 2
2.6.12
MIP_PH_PRT_L0
MIP_PH_PRT_L1
Mirror Port periodic retraining timing register.
.
2.7
2.7.1
SAD_PAM0123
Register for legacy dev0func0 90h-93h address space.
1
RW
0
RESET_MODIFIER. Modifies soft reset to default reset when set.
0
RW1S
0
PHY_RESET. Physical Layer Reset. Note while this register is locked after
going to FAST speed L0, this bit is not locked.
Device:
0
Function: 0
Offset:
E0h, F0h
Access as a Dword
Bit
Type
Reset
Value
Description
Device:
0
Function: 0
Offset:
E4h, F4h
Access as a Dword
Bit
Type
Reset
Value
Description
21:16
RW
29
RETRAIN_PKT_CNT. Retraining packet count.
13:10
RW
11
EXP_RETRAIN_INTERVAL. Exponential count for retraining interval.
7:0
RW
3
RETRAIN_INTERVAL. Periodic retraining interval. A value of 0 indicates
retraining is disabled.
Device:
0
Function: 1
Offset:
40h
Access as a Dword
Bit
Type
Reset
Value
Description
29:28
RW
0
PAM3_HIENABLE. 0D4000-0D7FFF Attribute (HIENABLE) This field controls
the steering of read and write cycles that address the BIOS area from 0D4000
to 0D7FFF.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
25:24
RW
0
PAM3_LOENABLE. 0D0000-0D3FFF Attribute (LOENABLE) This field controls
the steering of read and write cycles that address the BIOS area from 0D0000
to 0D3FFF
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.
00: DRAM Disabled: All accesses are directed to ESI.
01: Read Only: All reads are sent to DRAM. All writes are forwarded to ESI.
10: Write Only: All writes are send to DRAM. Reads are serviced by ESI.
11: Normal DRAM Operation: All reads and writes are serviced by DRAM.