Intel Core™ i7-860 Processor (8M Cache, 2.80 GHz) BX8060517860 User Manual

72

Datasheet

This register contains parameters that specify Rcomp timings.

This register contains parameters that specify ODT timings. All values are in DCLK.

16

RW

1

RCOMP_EN. 
Enable Rcomp. When set, the Integrated Memory Controller will do the 

programmed blocking of requests and send indications.

15:10

RW

2

RCOMP_CMD_DCLK. 
Delay from the start of an RCOMP command blocking period in which the 

command rcomp update is done. Program this field to 15 for all configurations.

9:4

RW

9

RCOMP_LENGTH. 
Number of Dclks during which all commands are blocked for an RCOMP update. 

Data RCOMP update is done on the last DCLK of this period. Program this field 

to 31 for all configurations.

3:0

RW

0

RCOMP_INTERVAL. 
Duration of interval between Rcomp in increments of tRefI. Register value is 

tRefI-1. For example a setting of 0 will produce an interval of tRefI.

26:24

RW

0

TAOFD. 
ODT turn off delay.

23:20

RW

6

MCODT_DURATION. 
Controls the duration of MC ODT activation. BL/2 + 2. 

19:16

RW

4

MCODT_DELAY. 
Controls the delay from Rd CAS to MC ODT activation. This value is tCAS-1.

15:12

RW

5

ODT_RD_DURATION. 
Controls the duration of Rd ODT activation. This value is BL/2 + 2.

11:8

RW

0

ODT_RD_DELAY. 
Controls the delay from Rd CAS to ODT activation. This value is tCAS-tWL. 

7:4

RW

5

ODT_WR_DURATION. 
Controls the duration of Wr ODT activation. value is BL/2 + 2.

3:0

RW

0

ODT_WR_DELAY. 
Controls the delay from Wr CAS to ODT activation. This value is always 0.