Intel Xeon X3460 BX80605X3460 User Manual
Product codes
BX80605X3460
Intel® Xeon® Processor 3400 Series Datasheet, Volume 2
199
Processor Uncore Configuration Registers
4.4.3.1
Stepping Revision ID (SRID)
This register contains the revision number of the processor.
The SRID is a 4-bit hardwired value assigned by Intel, based on product’s stepping. The
SRID is not a directly addressable PCI register. The SRID value is reflected through the
RID register when appropriately addressed. The 4 bits of the SRID are reflected as the
two least significant bits of the major and minor revision field respectively. See
SRID is not a directly addressable PCI register. The SRID value is reflected through the
RID register when appropriately addressed. The 4 bits of the SRID are reflected as the
two least significant bits of the major and minor revision field respectively. See
4.4.3.2
Compatible Revision ID (CRID)
The CRID is an 4-bit hardwired value assigned by Intel during manufacturing process.
Normally, the value assigned as the CRID will be identical to the SRID value of a
previous stepping of the product with which the new product is deemed “compatible”.
Normally, the value assigned as the CRID will be identical to the SRID value of a
previous stepping of the product with which the new product is deemed “compatible”.
The CRID is not a directly addressable PCI register. The CRID value is reflected through
the RID register when appropriately addressed.The 4 bits of the CRID are reflected as
the two least significant bits of the major and minor revision field respectively. See
the RID register when appropriately addressed.The 4 bits of the CRID are reflected as
the two least significant bits of the major and minor revision field respectively. See
Device:
0
Function: 0, 1
Offset:
08h
Device:
2
Function: 0, 1
Offset:
08h
Device:
3
Function: 0, 1, 4
Offset:
08h
Device:
4, 5
Function: 0–3
Offset:
08h
Bit
Attr
Default
Description
7:4
RO
See
description
Minor Revision
Steppings which required all masks be regenerated.
Refer to the Intel
Steppings which required all masks be regenerated.
Refer to the Intel
®
Xeon
®
Processor 3400 Series Speci
fication Update
for the value of the Revision ID Register.
3:0
RO
See
description
Minor Revision Identification Number
Increment for each steppings which do not require masks to be
Increment for each steppings which do not require masks to be
regenerated.
Refer to the Intel
Refer to the Intel
®
Xeon
®
Processor 3400 Series Speci
fication Update
for the value of the Revision ID Register.