Intel S5000XAL BB5000XALR User Manual
Product codes
BB5000XALR
Functional Architecture
Intel
®
Server Board S5000PAL / S5000XAL TPS
Revision 1.9
Intel order number: D31979-010
26
3.1.2.1
Processor Population Rules
When two processors are installed, both must be of identical revision, core voltage, and bus/core speed.
Mixed processor steppings is supported. However, the stepping of one processor cannot be greater than
one stepping back of the other. When only one processor is installed, it must be in the socket labeled
CPU1. The other socket must be empty.
Mixed processor steppings is supported. However, the stepping of one processor cannot be greater than
one stepping back of the other. When only one processor is installed, it must be in the socket labeled
CPU1. The other socket must be empty.
The board is designed to provide up to 130A of current per processor. Processors with higher current
requirements are not supported.
requirements are not supported.
No terminator is required in the second processor socket when using a single processor configuration.
3.1.2.2
Common Enabling Kit (CEK) Design Support
The server board complies with Intel’s Common Enabling Kit (CEK) processor mounting and heat sink
retention solution. The server board ships with a CEK spring snapped onto the underside of the server
board, beneath each processor socket. The heat sink attaches to the CEK, over the top of the processor
and the thermal interface material (TIM). See the figure below for the stacking order of the chassis, CEK
spring, server board, TIM, and heat sink.
retention solution. The server board ships with a CEK spring snapped onto the underside of the server
board, beneath each processor socket. The heat sink attaches to the CEK, over the top of the processor
and the thermal interface material (TIM). See the figure below for the stacking order of the chassis, CEK
spring, server board, TIM, and heat sink.
The CEK spring is removable, allowing for the use of non-Intel heat sink retention solutions.
Note:
The processor heat sink and CEK spring shown in the following diagram are for reference
purposes only. The actual processor heat sink and CEK solutions compatible with this generation server
board may be of a different design.
board may be of a different design.
Heatsink assembly
Thermal interface material (TIM)
Server board
CEK spring
Chassis
Figure 10. CEK Processor Mounting
3.1.3 Memory
Sub-system
On the Intel® Server Board S5000PAL / S5000XAL, the MCH provides four channels of Fully Buffered
DIMM (FB-DIMM) memory. Each channel can support up to 2 Dual Ranked FB-DIMM DDR2 DIMMs. FB-
DIMM memory channels are organized in to two branches for support of RAID 1 (mirroring). The MCH
can support up to 8 DIMMs or a maximum memory size of 32 GB physical memory in non-mirrored mode
and 16 GB physical memory in a mirrored configuration. The read bandwidth for each FB-DIMM channel
is 4.25 GB/s for DDR2 533 FB-DIMM memory which gives a total read bandwidth of 17 GB/s for four FB-
DIMM channels. Thus, this provides 8.5 GB/s of write memory bandwidth for four FB-DIMM channels.
The read bandwidth for each FB-DIMM channel is 5.3GB/s for DDR2 667 FB-DIMM memory which gives
DIMM (FB-DIMM) memory. Each channel can support up to 2 Dual Ranked FB-DIMM DDR2 DIMMs. FB-
DIMM memory channels are organized in to two branches for support of RAID 1 (mirroring). The MCH
can support up to 8 DIMMs or a maximum memory size of 32 GB physical memory in non-mirrored mode
and 16 GB physical memory in a mirrored configuration. The read bandwidth for each FB-DIMM channel
is 4.25 GB/s for DDR2 533 FB-DIMM memory which gives a total read bandwidth of 17 GB/s for four FB-
DIMM channels. Thus, this provides 8.5 GB/s of write memory bandwidth for four FB-DIMM channels.
The read bandwidth for each FB-DIMM channel is 5.3GB/s for DDR2 667 FB-DIMM memory which gives