Cisco Cisco UCS C220 M3 Rack Server Data Sheet
Cisco UCS C460 M4 High-Performance Rack-Mount Server
SUPPLEMENTAL MATERIAL
65
CPUs and DIMMs
Physical Layout
Each CPU controls four serial memory interface 2 (SMI-2) channels (see
). There is one
memory riser for every two CPU channels. There are therefore two memory risers per CPU. Each CPU
channel drives a memory buffer on a riser card, and each memory buffer converts a CPU SMI into two DDR3
subchannels that each read and write three DIMMs on a memory riser.
channel drives a memory buffer on a riser card, and each memory buffer converts a CPU SMI into two DDR3
subchannels that each read and write three DIMMs on a memory riser.
The DIMM layout of a memory riser is shown in
Figure 8
Memory Riser DIMM Layout
In
, the buffers and channels are:
■
Buffer 1, subchannel A: slots A1 (blue), A2 (white), and A3 (black)
■
Buffer 1, subchannel B: slots B1 (blue), B2 (white), and B3 (black)
■
Buffer 2, subchannel C: slots C1 (blue), C2 (white), and C3 (black)
■
Buffer 2, subchannel D: slots D1 (blue), D2 (white), and D3 (black)
5
Memory risers with DIMMs
(8 risers with 12 DIMM sockets each)
Memory risers are hot-pluggable.
(8 risers with 12 DIMM sockets each)
Memory risers are hot-pluggable.
12
PCIe riser 2 (PCIe slots 6–10)
6
CPUs and heatsinks (two or four)
The CPUs and their heatsinks are below
The CPUs and their heatsinks are below
the memory risers and PCIe risers.
13
TPM socket and screw hole (on motherboard,
not visible under riser in this view)
7
Power supplies (four)
Redundant as 2+2, hot-swappable
Redundant as 2+2, hot-swappable
14
RTC battery (on motherboard, not visible under
riser in this view)
Notes . . .
1. Hot-swappable = No preconditioning or shutdown of the component is required before removal while the server
is powered on.
B1
B2
B3
A1
A2
A3
D1
D2
D3
C1
C2
C3
B1
B2
B3
A1
A2
A3
D1
D2
D3
C1
C2
C3