Intel Xeon 7130N LF80550KF0878M Data Sheet

Product codes
LF80550KF0878M
Page of 108
Features
Dual-Core Intel
®
 Xeon
®
 Processor 7000 Series Datasheet
93
7.4.9.6.1
Processor Part Number
Offset 38 - 3Eh contains seven ASCII characters reflecting the Intel part number for the processor. 
This information is typically marked on the outside of the processor. If the part number is less than 
7 characters, a leading space is inserted into the value. The part number should match the 
information found in the marking specification found in 
.
Example: The Intel Xeon processor with 512 KB L2 cache (533 MHz FSB) has a part number of 
80532KE. Thus, the data found at offset 38 - 3Eh is 38, 30, 35, 33, 32, 4B, 45.
7.4.9.6.2
Processor Electronic Signature
Offset 4D - 54h contains a 64-bit identification number. Intel does not guarantee that each 
processor will have a unique value in this field.
7.4.9.7
Feature Data 
This section provides information on key features that the platform may need to understand 
without powering on the processor.
7.4.9.7.1
Processor Core Feature Flags
Offset 74 - 77h contains a copy of results in EDX[31:0] from Function 1 of the CPUID instruction. 
These details provide instruction and feature support by product family. A decode of these bits is 
found in the Prescott, Nocona and Potomac Processor BIOS Writer’s Guide (BWG) or the AP-485 
Intel
®
 Processor Identification and CPUID Instruction application note.
7.4.9.7.2
Processor Feature Flags
Offset 78h provides feature information for the processor. This field is defined as follows:
Bits are set when a feature is present, and cleared when they are not.
7.4.9.7.3
Processor Thread and Core Information
Offset 79h provides information regarding the number of cores and threads on the processor. 
Table 7-18. Offset 78h Definitions
Bit
Definition
7
Multi-Core (set if the processor is a dual core processor)
6
Serial signature (set if there is a serial signature at offset 4D - 54h)
5
Electronic signature present (set if there is a electronic signature at 4D - 54h)
4
Thermal Sense Device present (set if an SMBus thermal sensor on package)
3
Reserved
2
OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)
1
Core VID present (set if there is a VID provided by the processor)
0
Reserved
Table 7-19. Offset 79h Definitions (Sheet 1 of 2)
Bits
Definition
7:4
Reserved