Intel 9150N NE80567KE025015 User Manual
Product codes
NE80567KE025015
Electrical Specifications
14
Intel
®
Itanium
®
Processor 9300 Series Datasheet
2.2
Signal Groups
The signals are grouped by buffer type and similar characteristics as listed in
The buffer type indicates which signaling technology and specifications apply to the
signals.
signals.
Table 2-1.
Signals with R
TT
Signal Termination
CSI[3:0]R[P/N]Dat[19:0]
CSI[5:4]R[P/N]Dat[9:0]
CSI[3:0]T[P/N]Dat[19:0]
CSI[5:4]T[P/N]Dat[9:0]
CSI[5:0]R[P/N]Clk
CSI[5:0]T[P/N]Clk
CSI[5:4]R[P/N]Dat[9:0]
CSI[3:0]T[P/N]Dat[19:0]
CSI[5:4]T[P/N]Dat[9:0]
CSI[5:0]R[P/N]Clk
CSI[5:0]T[P/N]Clk
VSS
FBD0NBICLK[A/B][P/N]0
FBD1NBICLK[C/D][P/N]0
FBD0SBOCLK[A/B][P/N]0
FBD1SBOCLK[C/D][P/N]0
FBD0NBI[A/B][P/N][12:0]
FBD1NBI[C/D][P/N][12:0]
FBD0SBO[A/B][P/N][9:0]
FBD1SBO[C/D][P/N][9:0]
FBD1NBICLK[C/D][P/N]0
FBD0SBOCLK[A/B][P/N]0
FBD1SBOCLK[C/D][P/N]0
FBD0NBI[A/B][P/N][12:0]
FBD1NBI[C/D][P/N][12:0]
FBD0SBO[A/B][P/N][9:0]
FBD1SBO[C/D][P/N][9:0]
VSS
XDPOCPD_N[7:0]
TRIGGER_N[1:0]
XDPOCPFRAME_N
XDPOCP_STRB_IN_N
PRBMODE_REQST_N
XDPOCP_STRB_OUT_N
PRBMODE_RDY_N
TRIGGER_N[1:0]
XDPOCPFRAME_N
XDPOCP_STRB_IN_N
PRBMODE_REQST_N
XDPOCP_STRB_OUT_N
PRBMODE_RDY_N
VCCIO
Table 2-2.
Signal Groups (Sheet 1 of 3)
Signal Group
Buffer Type
Signals 1, 2
Differential System Reference Clock
Differential
CMOS In Differential Pair
SYSCLK, SYSCLK_N;
SYSUTST_REFCLK_N, SYSUTST_REFCLK
SYSUTST_REFCLK_N, SYSUTST_REFCLK
Intel
®
QuickPath Interconnect Signal Groups
Differential
Input
CSI[3:0]R[P/N]Dat[19:0], CSI[5:4]R[P/N][9:0]
CSI[5:0]R[P/N]CLK
Differential
Output
CSI[3:0]T[P/N]Dat[19:0], CSI[5:4]T[P/N][9:0],
CSI[5:0]T[P/N]CLK
FB-DIMM Signals
Differential
Input
FBD0NBICLK[A/B][P/N]0
FBD1NBICLK[C/D][P/N]0
FBD1NBICLK[C/D][P/N]0
Differential
Output
FBD0SBOCLK[A/B][P/N]0
FBD1SBOCLK[C/D][P/N]0
FBD1SBOCLK[C/D][P/N]0
Differential
Input
FBD0NBI[A/B][P/N][12:0]
FBD1NBI[C/D][P/N][12:0]
FBD1NBI[C/D][P/N][12:0]
Differential
Output
FBD0SBO[A/B][P/N][9:0]
FBD1SBO[C/D][P/N][9:0]
FBD1SBO[C/D][P/N][9:0]
TAP