Intel 9150N NE80567KE025015 User Manual
Product codes
NE80567KE025015
Intel
®
Itanium
®
Processor 9300 Series Datasheet
95
Thermal Specifications
5.1.8
FORCEPR_N Signal Pin
FORCEPR_N is an input pin that will force the processor into one of two modes. The
default mode is the same state as PROCHOT_N. The processor will go into Single Issue
Mode (SIM) and also transition to the voltage and frequency of the lowest supported
P-state. Time limits and CMCI generation are the same as PROCHOT_N. The second
mode, selectable via QR_CSR_IPF_THERM_CONFIG.forcepr_mode, disables SIM and
timer functions while maintaining core frequency and voltage throttling. Both modes
can be disabled via QR_CSR_IPF_THERM_CONFIG.forcepr_disable.
default mode is the same state as PROCHOT_N. The processor will go into Single Issue
Mode (SIM) and also transition to the voltage and frequency of the lowest supported
P-state. Time limits and CMCI generation are the same as PROCHOT_N. The second
mode, selectable via QR_CSR_IPF_THERM_CONFIG.forcepr_mode, disables SIM and
timer functions while maintaining core frequency and voltage throttling. Both modes
can be disabled via QR_CSR_IPF_THERM_CONFIG.forcepr_disable.
5.1.9
Ararat Voltage Regulator Thermal Signals
The Intel Itanium processor 9300 series package allows the Ararat Voltage Regulator to
signal to the platform when it approaches its own thermal limits. The specific signals for
this purpose are VR_FAN_N, VR_THERMALERT_N, and VR_THERMTRIP_N.
signal to the platform when it approaches its own thermal limits. The specific signals for
this purpose are VR_FAN_N, VR_THERMALERT_N, and VR_THERMTRIP_N.
The processor does not monitor or respond to the VR_FAN_N and VR_THERMTRIP_N
pins. The response to VR_THERMALERT_N is to force the processor into the same state
as PROCHOT_N. The processor will go into SIM and also transition to the voltage and
frequency of the lowest supported P-state. Time limits and CMCI generation are active.
This response may be disabled via
QR_CSR_IPF_THERM_CONFIG.vr_thermalert_disable.
pins. The response to VR_THERMALERT_N is to force the processor into the same state
as PROCHOT_N. The processor will go into SIM and also transition to the voltage and
frequency of the lowest supported P-state. Time limits and CMCI generation are active.
This response may be disabled via
QR_CSR_IPF_THERM_CONFIG.vr_thermalert_disable.
5.2
Package Thermal Specifications and
Considerations
This section lists the thermal parameters of the Intel Itanium processor 9300 series
package. See
package. See
for the T
CASE
design target at Thermal Design Power (TDP) and
the minimum Tcontrol specification. The case temperature is defined as the
temperature measured at the center of the processor substrate on the top surface of
the IHS.
temperature measured at the center of the processor substrate on the top surface of
the IHS.
Notes:
1.
The processor maximum temperature is reached at T
PROCHOT
. That is when DT readout is equal to zero.
2.
Intel recommends that the thermal solution designs target the processor Thermal Design Power (TDP),
instead of its spontaneous maximum power consumption.
3.
Processor TDP is determined at the T
CASE
equal to T
CASE
@TDP
4.
Tcase is provided for the purpose of designing a processor compatible thermal solution.
5.
The THERMALERT and TCONTROL values are temperature offsets below T
PROCHOT
.
Note:
T
CASE
cannot be used as proxy for power dissipation due to the variation in work load
imbalances between cores.
TDPmax is 185 W or 155 W or 130 W depending on the SKU.
The combined max short-term (<250 s) power for the Ararat supplies (VCC_CORE,
VCC_UNCORE and VCC_CACHE) is limited to 230 W, and the total of all supplies is
limited to 250 W for the 185 W SKUs.
VCC_UNCORE and VCC_CACHE) is limited to 230 W, and the total of all supplies is
limited to 250 W for the 185 W SKUs.
Table 5-2.
Thermal Specification
TDP - Thermal
Design Power
(W)
Max Operating
Temperature
(DT Readout)
T
CASE
(°C)
Min
T
CASE
(°C)
@ TDP
Minimum
T
CONTROL
(DT Readout)
Notes
185
0
5
88
5
1, 2, 3, 4, 5
155
0
5
88
5
1, 2, 3, 4, 5
130
0
5
88
5
1, 2, 3, 4, 5