Intel X3470 BV80605001905AJ User Manual

Product codes
BV80605001905AJ
Page of 98
Datasheet, Volume 1
57
Signal Description
6.10
Power Sequencing
6.11
Processor Core Power Signals
Table 6-12. Power Sequencing
Signal Name
Description 
Direction
Type
SKTOCC#
SKTOCC# (Socket Occupied): This signal will be pulled to 
ground on the processor package. There is no connection 
to the processor silicon for this signal. System board 
designers may use this signal to determine if the 
processor is present.
O
SM_DRAMPWROK
SM_DRAMPWROK processor input: This signal connects to 
PCH DRAMPWROK.
I
Asynch 
CMOS
TAPPWRGOOD
Power good for ITP. Indicates to the ITP when the TAP can 
be accessed.
O
Asynch 
CMOS
VCCPWRGOOD_0
VCCPWRGOOD_1
VCCPWRGOOD_0 and VCCPWRGOOD_1 (Power Good) 
Processor Input: The processor requires these signals to 
be a clean indication that V
CC
, V
CCPLL
, V
TT
, V
AXG
 supplies 
are stable and within their specifications and that BCLK is 
stable and has been running for a minimum number of 
cycles. These signals must then transition monotonically 
to a high state. These signals can be driven inactive at 
any time, but BCLK and power must again be stable 
before a subsequent rising edge of VCCPWRGOOD_0 and 
VCCPWRGOOD_1. These signals should be tied together 
and connected to the CPUPWRGD output signal of the 
PCH. 
I
Asynch 
CMOS
VTTPWRGOOD
The processor requires this input signal to be a clean 
indication that the V
TT
 power supply is stable and within 
specifications. 'Clean' implies that the signal will remain 
low (capable of sinking leakage current), without glitches, 
from the time that the power supplies are turned on until 
they come within specification. The signal must then 
transition monotonically to a high state. Note that it is not 
valid for VTTPWRGOOD to be de-asserted while 
VCCPWRGOOD_0 and VCCPWRGOOD_1 are asserted.
I
Asynch 
CMOS
Table 6-13. Processor Core Power Signals (Sheet 1 of 2)
Signal Name
Description 
Direction
Type
ISENSE
Current sense from VRD11.1 Compliant Regulator to the 
processor core.
I
Analog
VCC
Processor core power supply. The voltage supplied to 
these pins is determined by the VID pins.
PWR
VCC_NCTF
VCC/Non-Critical to Function: Pin for package 
mechanical reliability.
PWR
VCC_SENSE
VCC_SENSE and VSS_SENSE provide an isolated, low 
impedance connection to the processor core voltage 
and ground. They can be used to sense or measure 
voltage near the silicon.
Analog