Intel Xeon L3406 CM80616005010AA User Manual

300

Datasheet, Volume 2

 summarizes IIO behavior on inbound I/O transactions from any PCIe port.

1.

Inbound I/O is enabled using CSRMISCCTRLSTS[30].

Any

Inbound I/O is disabled

Master Abort

VGA

Address within 3B0h–3BBh, 3C0h–3DFh and 

inbound I/O is enabled

1

 and (main switch SAD 

is programmed to forward VGA OR address 

not within local peer-to-peer I/O base/limit 

range but within global peer-to-peer I/O 

base/limit range)

Forward to Intel QuickPath Interconnect

Address within 3B0h–3BBh, 3C0h–3DFh and 

inbound I/O is enabled and main switch SAD 

is NOT programmed to forward VGA and one 

of the PCIe ports has VGAEN bit set

Forward to that PCIe port

Address within 3B0h–3BBh, 3C0h–3DFh and 

inbound I/O is enabled and main switch SAD 

is NOT programmed to forward VGA and none 

of the PCIe has VGAEN bit set but is within the 

I/O base/limit range of one of the PCIe port

Forward to that PCIe port

Address within 3B0h–3BBh, 3C0h–3DFh and 

inbound I/O is enabled and main switch SAD 

is NOT programmed to forward VGA and none 

of the PCIe has VGAEN bit set and is not 

within the I/O base/limit range of any of the 

PCIe ports and DMI is the subtractive decode 

port

Forward to DMI

Address within 03B0h–3BBh, 3C0h–3DFh and 

inbound I/O is enabled and main switch SAD 

is NOT programmed to forward VGA and none 

of the PCIe has VGAEN bit set and is not 

within the base/limit range of any PCIE port 

and DMI port is not the subtractive decode 

port

Master abort

Other Peer-

to-Peer

Address within LIO.BASE/LIO.LIMIT and 

inbound I/O is enabled and a PCIe port 

positively decoded as target

Forward to the PCI Express port

Address within LIO.BASE/LIO.LIMIT and 

inbound I/O is enabled and no PCIe port 

positively decoded as target and DMI is the 

subtractive decode port

Forward to DMI

Address within LIO.BASE/LIO.LIMIT and 

inbound I/O is enabled and no PCIe port 

decoded as target and DMI is not the 

subtractive decode port

Master Abort

Inbound I/O is enabled and address NOT 

within LIO.BASE/LIO.LIMIT but is within 

GIO.BASE/GIO.LIMIT

Forward to Intel QuickPath Interconnect

Non-

existent 

Addresses

Address ≥ 64 KB

Master Abort

All Else

Forward to subtractive decode port.