Intel Itanium 9330 LW80603004728AA User Manual

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VCCCACHE

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This provides power to the L3 cache on the processor. This is on the top of the 

package and is driven by the Ararat Voltage Regulator. Actual value of the voltage is 

determined by the settings of VID_VCCCACHE[5:0]

VCCCACHESENSE/

VSSCACHESENSE

Remote sense lines used by the Ararat Voltage Regulator to sense VCCCACHE die 

voltage. The Voltage Regulator should not draw more than 0.1mA from these pads.

VCCCORE

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This provides power to the Cores on the processor. This is on the top of the package 

and is driven by the Ararat Voltage Regulator. Actual value of the voltage is 

determined by the settings of VID_VCCCORE[6:0]

VCCCORESENSE/

VSSCORESENSE

Remote sense lines used by the Ararat Voltage Regulator to sense VCCCORE die 

voltage. The Voltage Regulator should not draw more than 0.1 mA from these pads.

VCCUNCORE

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This provides power to the Uncore on the processor. This is on the top of the 

package and is driven by the Ararat Voltage Regulator. Actual value of the voltage is 

determined by the settings of VID_VCCUNCORE[6:0]

VCCUNCORESENSE/

VSSUNCORESENSE

Remote sense lines used by the Ararat Voltage Regulator to sense VCCUNCORE die 

voltage. The Voltage Regulator should not draw more than 0.1 mA from these pads.

VCCIO

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VCCIO provides power to the input/output interface on the processor die.

VCCIO_FBD

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VCCIO_FBD provides power to the FBD_DIMM input/output interface on the 

processor die. 

VFUSERM

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This pin must be tied to VCCIO or connected to VCCIO via 0 ohm resistor.

VID_VCCCORE[6:0]
VID_VCCUNCORE[6:0]
VID_VCCCACHE[5:0]

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VCCCORE_VID, VCCUNCORE_VID and VID_VCCCACHE (Voltage ID) pads are used 

to support automatic selection of VCCCORE, VCCUNCORE and VCCCACHE. The 

VCCCORE, VCCUNCORE and VCCCACHE Voltage Regulator (Ararat) outputs must be 

disabled prior to these pins becoming invalid. The VID pins are needed to support 

processor voltage specification variations. The VCCCORE, VCCUNCORE and 

VCCCACHE Voltage Regulator (Ararat) outputs must supply the voltage that is 

requested by these pins, or disable itself.

VR_FAN_N

I/O

This signal is open drain/collector driven by Ararat Voltage Regulator into a pad at 

the top of the processor package and out through a pin at the bottom of the 

processor package. When asserted, it indicates that the temperature on the Ararat 

solution is approximately 10% below the VR_THERMTRIP_N limit. The Processor 

cores do not monitor or respond to this signal. The Platform could monitor this pin 

to implement thermal management, such as controlling fan speed (airflow). 

VR_PROCTYPE[1:0]

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VR_PROCTYPE output informs the Ararat Voltage Regulator the processor type. 

These pins are tied to VSS (‘00) on Intel Itanium processor 9300 series. These pads 

are located at the top of the package. Future processors may use different bit 

configurations for this bus.

VR_THERMALERT_N

I /O

This signal is open drain/collector driven by Ararat Voltage Regulator into a pad at 

the top of the processor package and out through a pin at the bottom of the 

processor package. When asserted, it indicates that the temperature on the Ararat 

solution is about to exceed the VR_THERMTRIP_N limit. When enabled in the 

power consumption level. The Platform could monitor this pin to implement thermal 

management.

VR_THERMTRIP_N

I/O

This signal is open drain/collector driven by Ararat Voltage Regulator into a pad at 

the top of the processor package and out through a pin at the bottom of the 

processor package. When asserted, it indicates that the temperature on the Ararat 

solution has exceeded a critical threshold and it is required to shut down the Ararat 

solution immediately. The Processor cores do not monitor or respond to this signal. 

The Platform should immediately de-assert VROUTPUT_ENABLE0. If the Platform 

does not respond to this signal, the Ararat Voltage Regulator is permitted to 

shutdown, but should latch VR_THERMTRIP_N low, which can be reset by a power 

cycle or de-assertion of VROUTPUT_ENABLE0. VR_THERMTRIP_N trip point is 

determined by the Ararat Voltage Regulator Design and it should be set such that 

VR_THERMTRIP_N is asserted prior to permanent damage to the Ararat voltage 

regulator.

VROUTPUT_ENABLE

I/O

This signal is an input to the processor package (bottom), and drives into the Ararat 

voltage regulator from the top of the package. This should be driven by an open 

collector/drain driver, and a pull-up resistor should be located on the Ararat Voltage 

Regulator with a maximum load of 2mA, pulled to either 3.3 V or 1.1 V. When this 

signal is pulled down, the Ararat Voltage regulator should shut down VCCCORE, 

VCCUNCORE and VCCCACHE.