Intel 2 Duo U7500 LE80537UE0042M User Manual

30

Datasheet

NOTES:
1.

Each processor is programmed with a maximum valid voltage identification value (VID), which is set at 
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing 
such that two processors at the same frequency may have different settings within the VID range. Note 
that this differs from the VID employed by the processor during a power management event (Intel Thermal 
Monitor 2, Enhanced Intel SpeedStep Technology, or Extended Halt State). 

2.

The voltage specifications are assumed to be measured across V

CC_SENSE

 and V

SS_SENSE 

pins at socket with 

a 100-MHz bandwidth oscilloscope, 1.5-pF maximum probe capacitance, and 1-MΩ minimum impedance. 
The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from 
the system is not coupled in the scope probe. 

3.

Specified at 100°C Tj. 

4.

Specified at the VID voltage.

5.

The I

CCDES

(max) specification of 44 A comprehends processor I

CC

 design target for Intel Core2 Duo mobile 

processor for Intel Centrino Duo mobile technology.

6.

Base on simulations and averaged over the duration of any change in current. Specified by design/
characterization at nominal V

CC

. Not 100% tested.

7.

Measured at the bulk capacitors on the motherboard.

8.

Specified at nominal V

CC

.

9.

This is a steady-state I

CC

 current specification, which is applicable when both V

CCP

 and V

CC_CORE

 are high.

10.

This is a power-up peak current specification, which is applicable when V

CCP

 is high and V

CC_CORE

 is low.

11.

If a given Operating System C-State model is not based on the use of MWAIT or I/O Redirection, the Intel 
Core 2 Duo mobile processor Deeper Sleep VID will be same as LFM VID.

12.

T7600, T7400, T7200 processors feature 4-MB cache.

13.

T5600, T5500 processors feature 2-MB cache.

I

DSLP

I

CC

 Deep Sleep

LFM
HFM

17.0
23.7

A

3,4

I

DPRSLP

I

CC

 Deeper Sleep 

12.1

A

3,4

I

CCDC4

I

CC

 Intel Enhanced Deeper Sleep 

9.9

4

dI

CC/DT

V

CC 

Power Supply Current Slew Rate at CPU 

Package Pin

600

A/µs

6, 7

I

CCA

I

CC

 for V

CCA 

Supply

130

mA

I

CCP

I

CC

 for V

CCP 

Supply before V

CC

 Stable

I

CC

 for V

CCP 

Supply after V

CC

 Stable

4.5
2.5

A
A

9

10