Intel LF80550KG0804M Data Sheet
Dual-Core Intel® Xeon® Processor 7100 Series Datasheet
37
Electrical Specifications
Notes:
1.
Crossing voltage is defined as the instantaneous voltage value when the rising edge of BCLK0 is equal to
the falling edge of BCLK1.
2.
V
Havg
is the statistical average of the V
H
measured by the oscilloscope.
3.
Overshoot is defined as the absolute value of the maximum voltage.
4.
Undershoot is defined as the absolute value of the minimum voltage.
5.
Ringback Margin is defined as the absolute voltage difference between the maximum Rising Edge Ringback
and the maximum Falling Edge Ringback.
6.
Threshold Region is defined as a region entered around the crossing point voltage in which the differential
receiver switches. It includes input threshold hysteresis.
7.
The crossing point must meet the absolute and relative crossing point specifications simultaneously.
8.
V
Havg
can be measured directly using “Vtop” on Agilent scopes and “High” on Tektronix scopes.
Notes:
1.
These parameters are not tested and are based on design simulations.
2.
Pull up each line to 3.3 V using 1 KΩ, 5% resistor. Refer to 64-bit Intel
®
Xeon™ Processor MP Platform
Design Guide.
3.
Leakage to V
SS
with pin held at 2.5 V.
4.
Represents the maximum allowable termination voltage.
V
US
Undershoot
- 0.300
N/A
N/A
V
4
V
RBM
Ringback Margin
0.200
N/A
N/A
V
5
V
TM
Threshold Margin
V
CROSS
-0.100
V
CROSS
+0.100
V
6
Table 2-16. Front Side Bus Differential BCLK Specifications (Sheet 2 of 2)
Symbol
Parameter
Min
Typ
Max
Unit
Notes
Table 2-17.BSEL[1:0], VID[5:0], and CVID[3:0] DC Specifications
Symbol
Parameter
Typ
Max
Unit
Notes
R
ON
Buffer On Resistance
80
Ω
1
Rpull_up
Pull up resistor to 3.3V
1000
Ω
2
I
OL
Max Pin Current
8
mA
I
LO
Output Leakage Current
200
µA
3
V
TOL
Voltage Tolerance
3.3 * 1.05
V
4
Table 2-18. VIDPWRGD DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
0.0
0.30
V
V
IH
Input High Voltage
0.90
V
TT
V