Intel LF80550KG0804M Data Sheet
Electrical Specifications
38
Dual-Core Intel® Xeon® Processor 7100 Series Datasheet
Notes:
1.
V
IL
is defined as the voltage level at a receiving agent that will be interpreted as a logical low value.
2.
V
IH
is defined as the voltage level at a receiving agent that will be interpreted as a logical high value.
3.
The V
TT
referred to in these specifications refers to the instantaneous V
TT
.
4.
Leakage to V
SS
with pin held at V
TT
.
5.
The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load.
6.
Leakage to V
TT
with pin held at 300 mV.
Notes:
1.
All outputs are open drain.
2.
TAP signal group must meet system signal quality specification in
3.
The V
TT
referred to in these specifications refers to instantaneous V
TT
.
4.
The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load.
5.
V
HYS
represents the amount of hysteresis, nominally centered about 0.5 * V
TT
for all TAP inputs.
6.
0.24 V is defined at 20% of nominal V
TT
of 1.2 V.
Table 2-19. AGTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
0.0
GTLREF - (0.10 * V
TT
)
V
1,3
V
IH
Input High Voltage
GTLREF + (0.10 * V
TT
)
V
TT
V
2,3
V
OH
Output High Voltage
0.90 * V
TT
V
TT
V
3
I
OL
Output Low Current
N/A
V
TT
/
(0.50 * Rtt_min +
R
ON
_min || R
L
)
mA
5
I
LI
Input Leakage Current
N/A
±
200
µA
4
I
LO
Output Leakage Current
N/A
±
200
µA
6
R
ON
Buffer On Resistance
8
12
Ω
Table 2-20. PWRGOOD and TAP Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1
V
HYS
Input Hysteresis
120
396
mV
5
V
T+
PWRGOOD Input Low to
High Threshold Voltage
0.5 (V
TT
+ V
HYS_MIN
+
0.24)
0.5 * (V
TT
+ V
HYS_MAX
+
0.24)
V
3, 6
TAP Input Low to High
Threshold Voltage
0.5 * (V
TT
+ V
HYS_MIN
)
0.5 * (V
TT
+ V
HYS_MAX
)
V
3
V
T-
PWRGOOD Input High to
Low Threshold Voltage
0.4 * V
TT
0.6 * V
TT
V
3
TAP Input High to Low
Threshold Voltage
0.5 * (V
TT
- V
HYS_MAX
)
0.5 * (V
TT
- V
HYS_MIN
)
V
3
V
OH
Output High Voltage
N/A
V
TT
V
2,3
I
OL
Output Low Current
45
mA
4
I
LI
Input Leakage Current
±200
µA
I
LO
Output Leakage Current
±200
µA
R
ON
Buffer On Resistance
8
12
Ω
R
ON
TDO Buffer On
Resistance
7
12
Ω