Intel 530 LF80537NE0301M Data Sheet
Product codes
LF80537NE0301M
Electrical Specifications
28
Datasheet
NOTES:
1.
1.
Each processor is programmed with a maximum valid voltage identification value (VID), which is set at
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing
in such a way that two processors at the same frequency may have different settings within the VID range.
Note that this differs from the VID employed by the processor during a power management event (Intel
Thermal Monitor 2, or Extended Halt State).
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing
in such a way that two processors at the same frequency may have different settings within the VID range.
Note that this differs from the VID employed by the processor during a power management event (Intel
Thermal Monitor 2, or Extended Halt State).
2.
The voltage specifications are assumed to be measured across V
CC_SENSE
and V
SS_SENSE
pins at socket with
a 100-MHz bandwidth oscilloscope, 1.5-pF maximum probe capacitance, and 1-mΩ minimum impedance.
The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from
the system is not coupled in the scope probe.
The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from
the system is not coupled in the scope probe.
3.
Specified at 100 °C Tj.
4.
Specified at the nominal V
CC
.
5.
667-MHz FSB supported
6.
Instantaneous current I
CC_CORE_INST
of 55 A has to be sustained for short time (t
INST
) of 10 µs. Average
current is less than maximum specified I
CCDES
. VR OCP threshold should be high enough to support current
levels described herein.
7.
Measured at the bulk capacitors on the motherboard.
8.
Based on simulations and averaged over the duration of any change in current. Specified by design/
characterization at nominal V
characterization at nominal V
CC
. Not 100% tested.
9.
This is a power-up peak current specification, which is applicable when V
CCP
is high and V
CC_CORE
is low.
10.
This is a steady-state I
CC
current specification, which is applicable when both V
CCP
and V
CC_CORE
are high.
11.
512-KB L2 cache.
Table 7.
DC Voltage and Current Specifications for the T1x00 Celeron Mobile
Processors
Symbol
Parameter
Min
Typ
Max
Unit
Notes
V
CC
V
CC
of the Processor Core
0.95
1.15
1.30
V
1, 2
V
CC,BOOT
Default V
CC
Voltage for Initial Power Up
1.20
V
2, 8
V
CCP
AGTL+ Termination Voltage
1.00
1.05
1.10
V
V
CCA
PLL Supply Voltage
1.425
1.5
1.575
V
I
CCDES
I
CC
for processors
Recommended Design Targets:
36
A
5
I
CC
I
CC
for processors
A
Processor
Number
Number
Frequency
Die Variant
T1600
1.66 GHz
1 MB
41
A
3, 4
T1700
1.83 GHz
1 MB
41
A
3, 4
I
AH
,
I
SGNT
I
CC
Auto-Halt & Stop-Grant
21
A
3, 4
I
SLP
I
CC
Sleep
20.5
A
3, 4
I
DSLP
I
CC
Deep Sleep
18.6
A
3, 4
dI
CC/DT
V
CC
Power Supply Current Slew Rate at
CPU Package Pin
600
A/µs
6, 7
I
CCA
I
CC
for V
CCA
Supply
130
mA
I
CCP
I
CC
for V
CCP
Supply before V
CC
Stable
I
CC
for V
CCP
Supply after V
CC
Stable
4.5
2.5
2.5
A
A
A
9
10