AMD amd64 architecture User Manual
90
General-Purpose Programming
AMD64 Technology
24592—Rev. 3.15—November 2009
3.8
Input/Output
I/O devices allow the processor to communicate with the outside world, usually to a human or to
another system. In fact, a system without I/O has little utility. Typical I/O devices include a keyboard,
mouse, LAN connection, printer, storage devices, and monitor. The speeds these devices must operate
at vary greatly, and usually depend on whether the communication is to a human (slow) or to another
machine (fast). There are exceptions. For example, humans can consume graphics data at very high
rates.
another system. In fact, a system without I/O has little utility. Typical I/O devices include a keyboard,
mouse, LAN connection, printer, storage devices, and monitor. The speeds these devices must operate
at vary greatly, and usually depend on whether the communication is to a human (slow) or to another
machine (fast). There are exceptions. For example, humans can consume graphics data at very high
rates.
There are two methods for communicating with I/O devices in AMD64 processor implementations.
One method involves accessing I/O through ports located in I/O-address space (“I/O Addressing” on
page 90), and the other method involves accessing I/O devices located in the memory-address space
(“Memory Organization” on page 9). The address spaces are separate and independent of each other.
One method involves accessing I/O through ports located in I/O-address space (“I/O Addressing” on
page 90), and the other method involves accessing I/O devices located in the memory-address space
(“Memory Organization” on page 9). The address spaces are separate and independent of each other.
I/O-address space was originally introduced as an optimized means for accessing I/O-device control
ports. Then, systems usually had few I/O devices, devices tended to be relatively low-speed, device
accesses needed to be strongly ordered to guarantee proper operation, and device protection
requirements were minimal or non-existent. Memory-mapped I/O has largely supplanted I/O-address
space access as the preferred means for modern operating systems to interface with I/O devices.
Memory-mapped I/O offers greater flexibility in protection, vastly more I/O ports, higher speeds, and
strong or weak ordering to suit the device requirements.
ports. Then, systems usually had few I/O devices, devices tended to be relatively low-speed, device
accesses needed to be strongly ordered to guarantee proper operation, and device protection
requirements were minimal or non-existent. Memory-mapped I/O has largely supplanted I/O-address
space access as the preferred means for modern operating systems to interface with I/O devices.
Memory-mapped I/O offers greater flexibility in protection, vastly more I/O ports, higher speeds, and
strong or weak ordering to suit the device requirements.
3.8.1 I/O Addressing
Access to I/O-address space is provided by the IN and OUT instructions, and the string variants of
these instructions, INS and OUTS. The operation of these instructions are described in “Input/Output”
on page 63. Although not required, processor implementations generally transmit I/O-port addresses
and I/O data over the same external signals used for memory addressing and memory data. Different
bus-cycles generated by the processor differentiate I/O-address space accesses from memory-address
space accesses.
these instructions, INS and OUTS. The operation of these instructions are described in “Input/Output”
on page 63. Although not required, processor implementations generally transmit I/O-port addresses
and I/O data over the same external signals used for memory addressing and memory data. Different
bus-cycles generated by the processor differentiate I/O-address space accesses from memory-address
space accesses.
I/O-Address Space.
Figure 3-18 on page 91 shows the 64 Kbyte I/O-address space. I/O ports can be
addressed as bytes, words, or doublewords. As with memory addressing, word-I/O and doubleword-
I/O ports are simply two or four consecutively-addressed byte-I/O ports. Word and doubleword I/O
ports can be aligned on any byte boundary, but there is typically a performance penalty for unaligned
accesses. Performance is optimized by aligning word-I/O ports on word boundaries, and doubleword-
I/O ports on doubleword boundaries.
I/O ports are simply two or four consecutively-addressed byte-I/O ports. Word and doubleword I/O
ports can be aligned on any byte boundary, but there is typically a performance penalty for unaligned
accesses. Performance is optimized by aligning word-I/O ports on word boundaries, and doubleword-
I/O ports on doubleword boundaries.