AMD amd64 architecture User Manual
282
x87 Floating-Point Programming
AMD64 Technology
24592—Rev. 3.15—November 2009
Overflow Exception (OE).
The OE exception occurs when the value of a rounded floating-point
result is larger than the largest representable normalized positive or negative floating-point number in
the destination format, as shown in Table 6-5 on page 252. An overflow can occur through
computation or through conversion of higher-precision numbers to lower-precision numbers. See
“Precision” on page 260. Integer and BCD overflow is reported via the invalid-operation exception.
the destination format, as shown in Table 6-5 on page 252. An overflow can occur through
computation or through conversion of higher-precision numbers to lower-precision numbers. See
“Precision” on page 260. Integer and BCD overflow is reported via the invalid-operation exception.
Underflow Exception (UE).
The UE exception occurs when the value of a rounded, non-zero
floating-point result is too small to be represented as a normalized positive or negative floating-point
number in the destination format, as shown in Table 6-5 on page 252. Integer and BCD underflow is
reported via the invalid-operation exception.
number in the destination format, as shown in Table 6-5 on page 252. Integer and BCD underflow is
reported via the invalid-operation exception.
Precision Exception (PE).
The PE exception, also called the inexact-result exception, occurs when a
floating-point result, after rounding, differs from the infinitely precise result and thus cannot be
represented exactly in the specified destination format. Software that does not require exact results
normally masks this exception. See “Precision” on page 260 and “Rounding” on page 260.
represented exactly in the specified destination format. Software that does not require exact results
normally masks this exception. See “Precision” on page 260 and “Rounding” on page 260.
Stack Fault (SF).
The SF exception occurs when a stack overflow (due to a push or load into a non-
empty stack register) or stack underflow (due to referencing an empty stack register) occurs in the x87
stack-register file. The empty and non-empty conditions are shown in Table 6-3 on page 246. When
either of these conditions occur, the processor also sets the invalid-operation exception (IE) flag, and it
sets or clears the condition-code 1 (C1) bit to indicate the direction of the stack fault (C1 = 1 for
overflow, C1 = 0 for underflow). Unlike the flags for the other x87 exceptions, the SF flag does not
have a corresponding mask bit in the x87 control word.
stack-register file. The empty and non-empty conditions are shown in Table 6-3 on page 246. When
either of these conditions occur, the processor also sets the invalid-operation exception (IE) flag, and it
sets or clears the condition-code 1 (C1) bit to indicate the direction of the stack fault (C1 = 1 for
overflow, C1 = 0 for underflow). Unlike the flags for the other x87 exceptions, the SF flag does not
have a corresponding mask bit in the x87 control word.
6.8.3 x87 Floating-Point Exception Priority
Table 6-19 shows the priority with which the processor recognizes multiple, simultaneous SIMD
floating-point exceptions and operations involving QNaN operands. Each exception type is
characterized by its timing, as follows:
floating-point exceptions and operations involving QNaN operands. Each exception type is
characterized by its timing, as follows:
•
Pre-Computation—an exception that is recognized before an instruction begins its operation.
•
Post-Computation—an exception that is recognized after an instruction completes its operation.
For post-computation exceptions, a result may be written to the destination, depending on the type of
exception and whether the destination is a register or memory location. Operations involving QNaNs
do not necessarily cause exceptions, but the processor handles them with the priority shown in
Table 6-19 on page 283 relative to the handling of exceptions.
exception and whether the destination is a register or memory location. Operations involving QNaNs
do not necessarily cause exceptions, but the processor handles them with the priority shown in
Table 6-19 on page 283 relative to the handling of exceptions.