Nokia 9110 Service Manual
PAMS
Technical Documentation
RAE–2
BS1
Page 5 – 26
Section 02/99
External Serial Interface
The UART1 External serial interface is used for PC–connectivity. The RS–
connection is provided by a 3–signal interface (RXD,TXD, and DTR)
which is routed to the system connector. Maximum data rate is
230.4kbps.
connection is provided by a 3–signal interface (RXD,TXD, and DTR)
which is routed to the system connector. Maximum data rate is
230.4kbps.
The re–link feature connects the UART1 and the UART2 (FBUS) internal-
ly together. This provides the signal routing from the system connector to
the CMT.
ly together. This provides the signal routing from the system connector to
the CMT.
The Autobaud detection circuitry can detect bit rates from 300 bps tp
115.2kbps. The autobaud state machine starts when enabled by the CPU.
The bit rate measurement begins on the first negative edge of the
CPU_RXD line. After detecting the start bit width, and therefore the bit
rate, the remainder of the incoming data stream is sampled at this rate.
115.2kbps. The autobaud state machine starts when enabled by the CPU.
The bit rate measurement begins on the first negative edge of the
CPU_RXD line. After detecting the start bit width, and therefore the bit
rate, the remainder of the incoming data stream is sampled at this rate.
This UART is shared with the IrDA circuitry and thus only one of them can
be used at a time.
be used at a time.
IR–Transceiver
The IR–transceiver controller is shared with the UART1. Infrared data
transfer is started with 9600bps and then the data rate is increased to
115.2kbps if the connected device supports higher speed. The protocol is
the standard one of the Infrared Data Association. The CPU hardware
implementation includes bit stuffing (when transmitting), CRC calculation,
removing bit stuffing, and removing beginning of frame (when receiving) .
transfer is started with 9600bps and then the data rate is increased to
115.2kbps if the connected device supports higher speed. The protocol is
the standard one of the Infrared Data Association. The CPU hardware
implementation includes bit stuffing (when transmitting), CRC calculation,
removing bit stuffing, and removing beginning of frame (when receiving) .
Handsfree loudspeaker
The Handsfree speaker power amplifier circuitry is located on the BS1
module. The HF–speaker is used to produce the PDA key–click sounds,
error beeps, and tunes. When the lid is opened, the loudspeaker is used
as an handsfree speaker, producing key–click sound when a PDA
QWERTY key is pressed, and producing tunes. The HF–speaker power
amplifier can be controlled by the PDA CPU, or CMT.
module. The HF–speaker is used to produce the PDA key–click sounds,
error beeps, and tunes. When the lid is opened, the loudspeaker is used
as an handsfree speaker, producing key–click sound when a PDA
QWERTY key is pressed, and producing tunes. The HF–speaker power
amplifier can be controlled by the PDA CPU, or CMT.
Keyboard
The keyboard interface comprises 10x8 matrix lines. The QWERTY key-
board pads are located on the other side of the BS1 module board. 4x2
(2Row/4Column) matrix is routed to the lid. Four columns are multiplexed
with CMT keyboard columns. Multiplexing is done by using buffer located
on the BS1 module. This buffer is controlled by Baseband voltage (VBB).
When the lid is closed these four columns are switched to inputs and they
are not read by the CPU.
board pads are located on the other side of the BS1 module board. 4x2
(2Row/4Column) matrix is routed to the lid. Four columns are multiplexed
with CMT keyboard columns. Multiplexing is done by using buffer located
on the BS1 module. This buffer is controlled by Baseband voltage (VBB).
When the lid is closed these four columns are switched to inputs and they
are not read by the CPU.