Nokia 9110 Service Manual

Page of 40
PAMS
Technical Documentation
RAE–2
BS8_RF
Page 3 – 13
Original  02/99
VCO
CHG.
PUMP
PHASE
DET.
M
R
f_out
LP
Kvco
Kd
M = A(P+1) + (N–A)P=
fref
f_out / M
freq.
reference
      NP+A
AFC–controlled VCTCXO
VHF PLL is also located into SUMMA.  It comprises a 16/17 ( P/P+1 )
dual modulus prescaler, N– and A–dividers, reference divider, phase de-
tector and charge pump for the loop filter.  The VHF local signal is gener-
ated with a discrete VCO–circuit.  The VHF PLL works in the same way
as UHF–PLL.   The VHF–PLL is locked on fixed frequency, so higher ref-
erence frequency is used to decrease phase noise.
Receiver
Receiver is a dual conversion linear receiver.
The received RF–signal from the antenna is fed via the duplex filter to
LNA ( low noise amplifier ) in CRFU_1a.  Active parts (RF–transistor and
biasing and AGC–step circuitry) are integrated into this chip.  Input and
output matching networks are external.
Gain selection is carried out with PDATA0 control.  Gain step in LNA is
activated when the RF–level in the antenna is about –45 dBm.
After the LNA amplified signal ( with low noise level ) is fed to bandpass
filter, which is a SAW–filter ( SAW, surface acoustic wave ).
This bandpass filtered signal is then mixed down to 71 MHz, which is the
first intermediate frequency.  The 1st mixer is located into CRFU_1a
ASIC.  This integrated mixer is a double balanced Gilbert cell.  All active
parts and biasing are integrated and matching components are external.
Because this is an axtive mixer it also amplifies IF–frequency.  Also local
signal buffering is integrated and upper side injection is used. First local
signal is generated by the UHF–synthesizer.
The first IF–signal is then bandpass filtered with a selective SAW–filter.
From the mixer output to the IF–circuit input the signal path is balanced.
The IF–filter provides selectivity for channels greater than +/–200 kHz.
Also it attenuates image frequency of the second mixer and intermodulat-