Nokia 9110 Service Manual
PAMS
Technical Documentation
RAE–2
Baseband
Page 2– 38
Original 02/99
Digital control
All the baseband functions are controlled by the MAD2 ASIC, which con-
sists of a MCU, a system ASIC and a DSP. In addition to the internal
RAM/ROM memory, the MAD2 has an external RAM memory and exter-
nal FLASH and EEPROM type of memories.
sists of a MCU, a system ASIC and a DSP. In addition to the internal
RAM/ROM memory, the MAD2 has an external RAM memory and exter-
nal FLASH and EEPROM type of memories.
MAD2
MAD2 comprises the following building blocks:
– ARM RISC processor with both 16–bit instruction set (THUMB mode)
and 32–bit instruction set (ARM mode)
– TI Lead DSP core with peripherals:
– API (Arm Port Interface memory) for MCU–DSP commu-
nication, DSP code download, MCU interrupt handling vec-
tors (in DSP RAM) and DSP booting
tors (in DSP RAM) and DSP booting
– Serial port (connection to PCM)
– Timer
– DSP memory (80 kW RAM in PD version of MAD2)
– BUSC (BusController for controlling accesses from ARM to API, Sys-
tem Logic and MCU external memories, both 8– and 16–bit memories)
– System Logic
– CTSI (Clock, Timing, Sleep and Interrupt control)
– MCUIF (Interface to ARM via B
US
C). Contains MCU Boo-
tROM
– DSPIF (Interface to DSP)
– MFI (Interface to COBBA AD/DA Converters)
– CODER (Block encoding/decoding and A51&A52 ciphering)
– AccIF(Accessory Interface)
– SCU (Synthesizer Control Unit for controlling 2 separate
synthesizer)
– UIF (Keyboard interface, serial control interface for COBBA
PCM Codec, LCD Driver and CCONT)
– SIMI (SimCard interface with enhanced features)
– PUP (Parallel IO, USART and PWM control unit for vibra
and buzzer)
The MAD2 operates from a 13 MHz system clock, which is generated
from the 13MHz VCXO frequency. The MAD2 supplies a 6,5MHz or a
from the 13MHz VCXO frequency. The MAD2 supplies a 6,5MHz or a