SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

SMSC LAN9311/LAN9311i

255

Revision 1.4 (08-19-08)

 

This read-only register contains the advertised ability of the link partner’s PHY and is used in the Auto-
Negotiation process with the Virtual PHY. Because the Virtual PHY does not physically connect to an
actual link partner, the values in this register are emulated as described below.

Offset:
Index (decimal):

1D4h
5

Size:

32 bits

31:16

RESERVED
(See 

)

RO

-

15

Next Page
This bit indicates the emulated link partner PHY next page capability and is 
always 0.

RO

0b

14

Acknowledge
This bit indicates whether the link code word has been received from the 
partner and is always 1.

RO

1b

13

Remote Fault
Since there is no physical link partner, this bit is not used and is always 
returned as 0.

RO

0b

12

RO

-

11

Asymmetric Pause
This bit indicates the emulated link partner PHY asymmetric pause 
capability.

RO

10

Pause
This bit indicates the emulated link partner PHY symmetric pause capability.

RO

9

100BASE-T4
This bit indicates the emulated link partner PHY 100BASE-T4 capability. 
This bit is always 0.

RO

0b

8

100BASE-X Full Duplex
This bit indicates the emulated link partner PHY 100BASE-X full duplex 
capability.

RO