SMSC LAN9311 User Manual

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Revision 1.4 (08-19-08)

258

SMSC LAN9311/LAN9311i

 

This read/write register contains a current link speed/duplex indicator and SQE control.

Offset:
Index (decimal):

1DCh
31

Size:

32 bits

31:16

RESERVED
(See 

)

RO

-

15

RO

-

14

Switch Looopback MII
When set, transmissions from the switch fabric Port 0(Host MAC) are not 
sent to the Host MAC. Instead, they are looped back into the switch engine.

From the MAC viewpoint, this is effectively a FAR LOOPBACK.

If loopback is enabled during half-duplex operation, then the Enable Receive 
Own Transmit bit in the 

 must be set for this port. Otherwise, the switch fabric will 

ignore receive activity when transmitting in half-duplex mode.

This mode works even if the Isolate bit of the 

 is set.

R/W

0b

13:8

RO

-

7

Switch Collision Test MII
When set, the collision signal to the switch fabric Port 0(Host MAC) is active 
during transmission from the switch engine.

It is recommended that this bit be used only when using loopback mode.

R/W

0b

6:5

RO

-

4:2

Current Speed/Duplex Indication
This field indicates the current speed and duplex of the Virtual PHY link. 

RO

1

RO

-

0

SQEOFF
This bit enables/disables the Signal Quality Error (Heartbeat) test.

R/W

NASR

0

0

0

RESERVED

0

0

1

10Mbps

half-duplex

0

1

0

100Mbps

half-duplex

0

1

1

RESERVED

1

0

0

RESERVED

1

0

1

10Mbps

full-duplex

1

1

0

100Mbps

full-duplex

1

1

1

RESERVED