Intel architecture ia-32 User Manual

9-16 Vol. 3A

Compatibility mode execution is selected on a code-segment basis. This mode allows legacy
applications to coexist with 64-bit applications running in 64-bit mode. An operating system
running in IA-32e mode can execute existing 16-bit and 32-bit applications by clearing their
code-segment descriptor’s CS.L bit to 0.

In compatibility mode, the following system-level mechanisms continue to operate using the
IA-32e-mode architectural semantics:

•

Linear-to-physical address translation uses the 64-bit mode extended page-translation
mechanism.

•

Interrupts and exceptions are handled using the 64-bit mode mechanisms.

•

System calls (calls through call gates and SYSENTER/SYSEXIT) are handled using the
IA-32e mode mechanisms.

To return from IA-32e mode to paged-protected mode operation. Operating systems must use
the following sequence:

1.

Switch to compatibility mode.

2.

Deactivate IA-32e mode by clearing CR0.PG = 0. This causes the processor to set
IA32_EFER.LMA = 0. The MOV CR0 instruction used to disable paging and subsequent
instructions must be located in an identity-mapped page.

3.

Load CR3 with the physical base address of the legacy page-table-directory base address.

4.

Disable IA-32e mode by setting IA32_EFER.LME = 0.

5.

Enable legacy paged-protected mode by setting CR0.PG = 1

6.

A branch instruction must follow the MOV CR0 that enables paging. Both the MOV CR0
and the branch instruction must be located in an identity-mapped page.