Intel architecture ia-32 User Manual
9-46 Vol. 3A
PROCESSOR MANAGEMENT AND INITIALIZATION
9.11.6.3
Update in a System Supporting Intel Hyper-Threading Technology
Intel Hyper-Threading Technology has implications on the loading of the microcode update.
The update must be loaded for each core in a physical processor. Thus, for a processor
supporting Hyper-Threading Technology, only one logical processor per core is required to load
the microcode update. Each individual logical processor can independently load the update.
However, MP initialization must provide some mechanism (e.g. a software semaphore) to force
serialization of microcode update loads and to prevent simultaneous load attempts to the same
core.
The update must be loaded for each core in a physical processor. Thus, for a processor
supporting Hyper-Threading Technology, only one logical processor per core is required to load
the microcode update. Each individual logical processor can independently load the update.
However, MP initialization must provide some mechanism (e.g. a software semaphore) to force
serialization of microcode update loads and to prevent simultaneous load attempts to the same
core.
9.11.6.4
Update in a System Supporting Dual-Core Technology
Dual-core technology has implications on the loading of the microcode update. The microcode
update facility is not shared between processor cores in the same physical package. The update
must be loaded for each core in a physical processor.
update facility is not shared between processor cores in the same physical package. The update
must be loaded for each core in a physical processor.
If processor core supports Hyper-Threading Technology, the guideline described in Section
9.11.6.3 also applies.
9.11.6.3 also applies.
9.11.6.5
Update Loader Enhancements
The update loader presented in Section 9.11.6, “Microcode Update Loader,” is a minimal imple-
mentation that can be enhanced to provide additional functionality. Potential enhancements are
described below:
mentation that can be enhanced to provide additional functionality. Potential enhancements are
described below:
•
BIOS can incorporate multiple updates to support multiple steppings of the Pentium 4,
Intel Xeon, and P6 family processors. This feature provides for operating in a mixed
stepping environment on an MP system and enables a user to upgrade to a later version of
the processor. In this case, modify the loader to check the CPUID and platform ID bits of
the processor that it is running on against the available headers before loading a particular
update. The number of updates is only limited by available BIOS space.
Intel Xeon, and P6 family processors. This feature provides for operating in a mixed
stepping environment on an MP system and enables a user to upgrade to a later version of
the processor. In this case, modify the loader to check the CPUID and platform ID bits of
the processor that it is running on against the available headers before loading a particular
update. The number of updates is only limited by available BIOS space.
•
A loader can load the update and test the processor to determine if the update was loaded
correctly. See Section 9.11.7, “Update Signature and Verification.”
correctly. See Section 9.11.7, “Update Signature and Verification.”
•
A loader can verify the integrity of the update data by performing a checksum on the
double words of the update summing to zero. See Section 9.11.5, “Microcode Update
Checksum.”
double words of the update summing to zero. See Section 9.11.5, “Microcode Update
Checksum.”
•
A loader can provide power-on messages indicating successful loading of an update.
9.11.7
Update Signature and Verification
The Pentium 4, Intel Xeon, and P6 family processors provide capabilities to verify the authen-
ticity of a particular update and to identify the current update revision. This section describes the
model-specific extensions of processors that support this feature. The update verification
method below assumes that the BIOS will only verify an update that is more recent than the revi-
sion currently loaded in the processor.
ticity of a particular update and to identify the current update revision. This section describes the
model-specific extensions of processors that support this feature. The update verification
method below assumes that the BIOS will only verify an update that is more recent than the revi-
sion currently loaded in the processor.