Intel architecture ia-32 User Manual

14-20 Vol. 3A

To make the machine-check exception handler portable to the Pentium 4, Intel Xeon, P6 family,
and Pentium processors, checks can be made (using CPUID) to determine the processor type.
Then based on the processor type, machine-check exceptions can be handled specifically for
Pentium 4, Intel Xeon, P6 family, or Pentium processors.

When machine-check exceptions are enabled for the Pentium processor (MCE flag is set in
control register CR4), the machine-check exception handler uses the RDMSR instruction to read
the error type from the P5_MC_TYPE register and the machine check address from the
P5_MC_ADDR register. The handler then normally reports these register values to the system
console before aborting execution (see Example 14-20).

If a machine-check error is correctable, the processor does not generate a machine-check excep-
tion for it. To detect correctable machine-check errors, a utility program must be written that
reads each of the machine-check error-reporting register banks and logs the results in an
accounting file or data structure. This utility can be implemented in either of the following ways.

•

A system daemon that polls the register banks on an infrequent basis, such as hourly or
daily.

•

A user-initiated application that polls the register banks and records the exceptions. Here,
the actual polling service is provided by an operating-system driver or through the system
call interface.

Example 14-21 gives pseudocode for an error logging utility.

Assume that execution is restartable;
IF the processor supports MCA

THEN
FOR each bank of machine-check registers 

DO

READ IA32_MCi_STATUS;
IF VAL flag in IA32

_

MCi_STATUS = 1

THEN

IF ADDRV flag in IA32_MCi_STATUS = 1

THEN READ IA32_MCi_ADDR; 

FI;
IF MISCV flag in IA32_MCi_STATUS = 1

THEN READ IA32_MCi_MISC;

FI;
IF MCIP flag in IA32_MCG_STATUS = 1

(* Machine-check exception is in progress *) 
AND PCC flag in IA32_MCi_STATUS = 1