Intel Pentium M 730 RH80536GE0252M User Manual

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 4 Processor-M Datasheet  

13

Most Mobile Intel Pentium 4 Processor-M system bus signals use Assisted Gunning Transceiver 
Logic (AGTL+) signalling technology. As with the Intel P6 family of microprocessors, this 
signalling technology provides improved noise margins and reduced ringing through low-voltage 
swings and controlled edge rates. The termination voltage level for the Mobile Intel Pentium 4 
Processor-M AGTL+ signals is V

CC

, which is the operating voltage of the processor core. Previous 

generations of Intel mobile processors utilize a fixed termination voltage known as V

CCT

. The use 

of a termination voltage that is determined by the processor core allows better voltage scaling on 
the system bus for Mobile Intel Pentium 4 Processor-M. Because of the speed improvements to 
data and address bus, signal integrity and platform design methods have become more critical than 
with previous processor families. Design guidelines for the Mobile Intel Pentium 4 Processor-M 
system bus will be detailed in the Mobile Intel

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The AGTL+ inputs require a reference voltage (GTLREF) which is used by the receivers to 
determine if a signal is a logical 0 or a logical 1. GTLREF must be generated on the system board.

 Termination resistors are provided on the processor silicon and are terminated to its core voltage 
(V

CC

). Intel’s 845MP/845MZ chipsets will also provide on-die termination, thus eliminating the 

need to terminate the bus on the system board for most AGTL+ signals. However, some AGTL+ 
signals do not include on-die termination and must be terminated on the system board. For more 
information, refer to the Mobile Intel

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The AGTL+ bus depends on incident wave switching. Therefore, timing calculations for AGTL+ 
signals are based on flight time as opposed to capacitive deratings. Analog signal simulation of the 
system bus, including trace lengths, is highly recommended when designing a system.

For clean on-chip power distribution, the Mobile Intel Pentium 4 Processor-M have 85 V

CC

 

(power) and 181 V

SS 

(ground) inputs. All power pins must be connected to V

CC

, while all V

SS

 pins 

must be connected to a system ground plane.The processor V

CC

 pins must be supplied with the 

voltage determined by the VID (Voltage ID) pins and the loadline specifications (see 

Due to its large number of transistors and high internal clock speeds, the processor is capable of 
generating large average current swings between low and full power states. This may cause 
voltages on power planes to sag below their minimum values if bulk decoupling is not adequate. 
Care must be taken in the board design to ensure that the voltage provided to the processor remains 
within the specifications listed in 

. Failure to do so can result in timing violations and/or