Intel Pentium M 730 RH80536GE0252M User Manual
Product codes
RH80536GE0252M
Electrical Specifications
14
Mobile Intel
Pentium
4 Processor-M Datasheet
affect the long term reliability of the processor. For further information and design guidelines, refer
to the Mobile Intel
to the Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset Platform Design
Guide.
2.3.1
V
CC
Decoupling
Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR)
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the
large current swings when the part is powering on, or entering/exiting low-power states, must be
provided by the voltage regulator solution. For more details on decoupling recommendations,
please refer to the Mobile Intel
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the
large current swings when the part is powering on, or entering/exiting low-power states, must be
provided by the voltage regulator solution. For more details on decoupling recommendations,
please refer to the Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset
Platform Design Guide.
2.3.2
System Bus AGTL+ Decoupling
The Mobile Intel Pentium 4 Processor-M integrates signal termination on the die and incorporates
high frequency decoupling capacitance on the processor package. Decoupling must also be
provided by the system motherboard for proper AGTL+ bus operation. For more information, refer
to the Mobile Intel
high frequency decoupling capacitance on the processor package. Decoupling must also be
provided by the system motherboard for proper AGTL+ bus operation. For more information, refer
to the Mobile Intel
Pentium
4 Processor-M and Intel
845MP/845MZ Chipset Platform Design
Guide.
2.3.3
System Bus Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the system bus interface speed as well as the core frequency of the
processor. As in previous generation processors, the Mobile Intel Pentium 4 Processor-M core
frequency is a multiple of the BCLK[1:0] frequency. Refer to
processor. As in previous generation processors, the Mobile Intel Pentium 4 Processor-M core
frequency is a multiple of the BCLK[1:0] frequency. Refer to
for the Mobile Intel Pentium
4 Processor-M supported ratios.
NOTES:
1. Ratio is used for debug purposes only.
Table 2. Core Frequency to System Bus Multipliers
Core Frequency
Multiplication of System Core Frequency
to System Bus Frequency
Notes
2
800 MHz
1/8
1
1.2 GHz
1/12
1.4 GHz
1/14
1.5 GHz
1/15
1.6 GHz
1/16
1.7 GHz
1/17
1.8 GHz
1/18
1.9 GHz
1/19
2.0 GHz
1/20
2.2 GHz
1/22
2.4 GHz
1/24
2.5 GHz
1/25
2.6 GHz
1/26