Intel Pentium M 730 RH80536GE0252M User Manual
Product codes
RH80536GE0252M
Electrical Specifications
Mobile Intel
Pentium
4 Processor-M Datasheet
33
Table 15. PWRGOOD and TAP Signal Group DC Specifications
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. All outputs are open-drain.
3. TAP signal group must comply with the signal quality specifications in Section 3.
4. Refer to I/O Buffer Models for I/V characteristics.
5. The V
2. All outputs are open-drain.
3. TAP signal group must comply with the signal quality specifications in Section 3.
4. Refer to I/O Buffer Models for I/V characteristics.
5. The V
CC
referred to in these specifications refers to instantaneous V
CC
.
6. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load shown if
7. Vol max of 0.320 Volts is guaranteed when driving into a test load of 50 Ohms as indicated in
for the
TAP Signals.
8. V
HYS
represents the amount of hysteresis, nominally centered about 1/2 Vcc for all TAP inputs.
9. Leakage to V
SS
with pin held at V
CC
.
10.Leakage to V
CC
with pin held at 300 mV.
Table 16. ITPCLKOUT[1:0] DC Specifications
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. These parameters are not tested and are based on design simulations.
3. See
2. These parameters are not tested and are based on design simulations.
3. See
Symbol
Parameter
Min
Max
Unit
Notes
1
V
HYS
Input Hysteresis
200
300
mV
8
V
T+
Input Low to High
Threshold Voltage
1/2*(Vcc+V
HYS_MIN
)
1/2*(Vcc+V
HYS_MAX
)
V
5
V
T-
Input High to Low
Threshold Voltage
1/2*(Vcc-V
HYS_MAX
)
1/2*(Vcc-V
HYS_MIN
)
V
5
V
OH
Output High Voltage
N/A
V
CC
V
2,3,5
I
OL
Output Low Current
N/A
40
mA
6,7
I
HI
Pin Leakage High
N/A
100
µA
9
I
LO
Pin Leakage Low
N/A
500
µA
10
Ron
Buffer On Resistance
8.75
13.75
Ω
4
Symbol
Parameter
Min
Max
Unit
Notes
1
Ron
Buffer On Resistance
27
46
Ω
2,3