Intel Pentium M 730 RH80536GE0252M User Manual
Product codes
RH80536GE0252M
System Bus Signal Quality Specifications
Mobile Intel
Pentium
4 Processor-M Datasheet
53
Table 29. Ringback Specifications for PWRGOOD Input and TAP Signal Groups
NOTES:
1. All signal integrity specifications are measured at the processor silicon.
2. Unless otherwise noted, all specifications in this table apply to all Mobile Intel Pentium 4 Processor-M
2. Unless otherwise noted, all specifications in this table apply to all Mobile Intel Pentium 4 Processor-M
frequencies.
3. Please see
for maximum allowable overshoot.
4. Please see
for the DC specifications.
Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
TAP and PWRGOOD
0
→
1
V
t+(max)
TO V
t-(max)
V
1,2,3,4
TAP and PWRGOOD
1
→
0
V
t-(min)
TO V
t+(min)
V
1,2,3,4
Figure 26. Low-to-High System Bus Receiver Ringback Tolerance
GTLREF
V
CC
Noise
Margin
+10% GTLREF
-10% GTLREF
V
SS
Figure 27. High-to-Low System Bus Receiver Ringback Tolerance
V
CC
Noise
Margin
Margin
V
SS
GTLREF
+10% GTLREF
-10% GTLREF