Intel X3370 INXEON3370 Data Sheet
Product codes
INXEON3370
Features
88
Datasheet
6.2.1
Normal State
This is the normal operating state for the processor.
6.2.2
HALT and Extended HALT Powerdown States
The processor supports the HALT or Extended HALT powerdown state. The Extended
HALT Powerdown state must be configured and enabled via the BIOS for the processor
to remain within specification.
The Extended HALT state is a lower power state as compared to the Stop Grant State.
If Extended HALT is not enabled, the default Powerdown state entered will be HALT.
Refer to the sections below for details about the HALT and Extended HALT states.
6.2.2.1
HALT Powerdown State
HALT is a low power state entered when all the processor cores have executed the HALT
or MWAIT instructions. When one of the processor cores executes the HALT instruction,
that processor core is halted, however, the other processor continues normal operation.
The halted core will transition to the Normal state upon the occurrence of SMI#, INIT#,
or LINT[1:0] (NMI, INTR). RESET# will cause the processor to immediately initialize
itself.
The return from a System Management Interrupt (SMI) handler can be to either
Normal Mode or the HALT Power Down state. See the Intel Architecture Software
Developer's Manual, Volume 3B: System Programming Guide, Part 2 for more
information.
Figure 6-1. Processor Low Power State Machine
Normal State
- Normal Execution
Stop Grant State
- BCLK running
- Snoops and interrupts
allowed
Stop Grant Snoop State
- BCLK running
- Service Snoops to caches
Extended HALT Snoop or
HALT Snoop State
- BCLK running
- Service Snoops to caches
Extended HALT or HALT
State
- BCLK running
- Snoops and interrupts
allowed
HALT or MWAIT Instruction and
HALT Bus Cycle Generated
INIT#, INTR, NMI, SMI#, RESET#,
INIT#, INTR, NMI, SMI#, RESET#,
FSB interrupts
STPCLK#
Asserted
STPCLK#
De-asserted
STPCLK#
Asserted
STPCLK#
De-asserted
Snoop
Event
Occurs
Snoop
Event
Serviced
Snoop Event Occurs
Snoop Event Serviced