Intel E7-2803 AT80615006438AB User Manual
Product codes
AT80615006438AB
Datasheet Volume 2 of 2
33
Memory Controller (Mbox)
7.5
Partial Memory Mirroring
Partial memory mirroring is a mirror mode of operation with parts of system memory
operating with redundant memory at slave, leaving the rest of the system memory in
non-mirror mode. The granularity of the partial memory that gets to operate in mirror
mode is implementation dependent. On the Intel Xeon Processor E7-8800/4800/2800
Product Families, the granularity is defined to be at the Home Agent level, meaning
either all of the memory behind the Home Agent is mirrored or it is not.
operating with redundant memory at slave, leaving the rest of the system memory in
non-mirror mode. The granularity of the partial memory that gets to operate in mirror
mode is implementation dependent. On the Intel Xeon Processor E7-8800/4800/2800
Product Families, the granularity is defined to be at the Home Agent level, meaning
either all of the memory behind the Home Agent is mirrored or it is not.
Partial Memory Mirroring provides additional flexibility to the platform to optimize cost/
performance/RAS by providing higher degree of reliability to memory segment that is
deemed to be containing the most critical content, at lower cost than mirroring the
entire system memory.
performance/RAS by providing higher degree of reliability to memory segment that is
deemed to be containing the most critical content, at lower cost than mirroring the
entire system memory.
7.5.1
Usage Model
Memory Mirroring is a RAS feature that enables duplicating memory content at a
remote DIMM in the partition. This capability enables high data availability from
memory subsystem, which due to its large cell array, is prone to various error types.
Partial Memory Mirroring enables you to select the segments of system memory that
will be containing the most critical code, that is, Kernel codes, to operate with higher
degree of reliability than the rest of the data. OEM will need to have control over the OS
to load the critical code/data into the mirrored memory region. This form of partial
mirror configuration is done statically at power up, with no dynamic readjustment to
the configuration. This usage model is enabled for the Intel Xeon processor 7500
series-based platform.
remote DIMM in the partition. This capability enables high data availability from
memory subsystem, which due to its large cell array, is prone to various error types.
Partial Memory Mirroring enables you to select the segments of system memory that
will be containing the most critical code, that is, Kernel codes, to operate with higher
degree of reliability than the rest of the data. OEM will need to have control over the OS
to load the critical code/data into the mirrored memory region. This form of partial
mirror configuration is done statically at power up, with no dynamic readjustment to
the configuration. This usage model is enabled for the Intel Xeon processor 7500
series-based platform.
'Mirroring within a memory controller is not supported.
7.5.2
Overview
The Intel
®
Xeon
®
Processor 7500 Series-based platform enables memory mirroring
operation by making use of two directly connected socket's Home Agent/
memory_controller as the master mirror agent, and an identical Home Agent/
memory_controller as slave agent. In partial memory configuration, the platform BIOS/
BMC, will configure only one pair of Home Agents in mirror mode, leaving the rest of
Home Agents in non-mirror.
memory_controller as the master mirror agent, and an identical Home Agent/
memory_controller as slave agent. In partial memory configuration, the platform BIOS/
BMC, will configure only one pair of Home Agents in mirror mode, leaving the rest of
Home Agents in non-mirror.