Intel E7-4807 AT80615006432AB User Manual
Product codes
AT80615006432AB
Datasheet Volume 2 of 2
39
Power Management Architecture (Wbox)
9
Power Management
Architecture (Wbox)
The power management control unit, (Wbox), controls power management
functionality based on the current behavior and desired operating point for each of the
cores. Each core provides information on the desired power state of that core, core
temperature information, voltage seen by the core and desired operating frequency to
the Wbox.
functionality based on the current behavior and desired operating point for each of the
cores. Each core provides information on the desired power state of that core, core
temperature information, voltage seen by the core and desired operating frequency to
the Wbox.
The Wbox is responsible for power management functions including:
1. Controlling the voltage regulator for the core voltage
2. Managing transitions between Power States and V/F operating points
3. Detection of and response to thermal events
2. Managing transitions between Power States and V/F operating points
3. Detection of and response to thermal events
The voltage supply for the cores is distinct from the voltage supply for the uncore.
There is one voltage regulator for all of the cores, but the voltage supply for each core
is isolated from the main core voltage supply to allow power control to individual cores.
There is one voltage regulator for all of the cores, but the voltage supply for each core
is isolated from the main core voltage supply to allow power control to individual cores.
The entire uncore (with the exception of the PLLs) runs at the same voltage, which is
held static, and does not change during operation. The voltage supply for the PLLs is
also static.
held static, and does not change during operation. The voltage supply for the PLLs is
also static.
9.1
Thermal Management
9.1.1
Thermal Monitoring - 2 (TM2)
When any core's temperature exceeds TM2 threshold, it initiates package wide adaptive
voltage/frequency transition. If the socket remains hot at lowest support V/F (in
response to TM2), it initiates socket wide TM1 to modulate each core clocks to control
temperature. Intel Xeon Processor E7-8800/4800/2800 Product Families
implementation is similar as in Intel Xeon processor 7500 series. Currently, Intel Xeon
Processor E7-8800/4800/2800 Product Families does not include uncore thermal sensor
temp output for any thermal throttling management same as in Intel Xeon processor
7500 series with assumption that uncore will never be hotter then cores when any core
is active.
voltage/frequency transition. If the socket remains hot at lowest support V/F (in
response to TM2), it initiates socket wide TM1 to modulate each core clocks to control
temperature. Intel Xeon Processor E7-8800/4800/2800 Product Families
implementation is similar as in Intel Xeon processor 7500 series. Currently, Intel Xeon
Processor E7-8800/4800/2800 Product Families does not include uncore thermal sensor
temp output for any thermal throttling management same as in Intel Xeon processor
7500 series with assumption that uncore will never be hotter then cores when any core
is active.
9.1.2
Thermal Monitoring - 1 (TM1) and T-state
TM1 or T-state is initiated in response to thermal events or OS request through MSR
write (or IO redirection in case of legacy ICH based throttling) resp. Both the events
results in per core clock modulation. Clock modulation duty cycle is fixed for TM1 at
37.5% but is programmable for T-state request at 12.5% granularity. Intel Xeon
Processor E7-8800/4800/2800 Product Families implementation is similar as in Intel
Xeon processor 7500 series.
write (or IO redirection in case of legacy ICH based throttling) resp. Both the events
results in per core clock modulation. Clock modulation duty cycle is fixed for TM1 at
37.5% but is programmable for T-state request at 12.5% granularity. Intel Xeon
Processor E7-8800/4800/2800 Product Families implementation is similar as in Intel
Xeon processor 7500 series.