Intel E7-4807 AT80615006432AB User Manual

Datasheet Volume 2 of 2

37

The Intel Xeon Processor E7-8800/4800/2800 Product Families have two fully buffered 
DIMM (FBD) ports; each port is of two FBD channels connected to the Buffer-On-Board 
(BoB), the Intel 7500 Scalable Memory Buffer. There are four full-width Intel QPI ports 
for inter-processor communications. The Physical layer for these internal (FBD) and 
external (Intel QPI) channels/links is implemented in Pbox. Pbox implements the digital 
logic and analog front end for these interfaces.

There are two logic flavors of Pbox, one is FBD-only and the other being Intel QPI-only, 
implements the channel/link initialization state machines along with the analog front 
end. There are other side band ports which are distributed in four miscellaneous ports 
at the sides. Each FBD and Intel QPI port consists of an electrical-block and a digital 
sub-block. The electrical sub-block (aka analog front end, AFE) provides the core 
analog circuit to enable high-speed differential point-to-point link. The digital sub-block 
provides control logic to support AFE. 

1. Transmitter SB Failover Muxing logic extended from 40-bits to 80-bits.
2. Receiver Datapath doubled from 52-bits to 104-bits.
3. Frame Boundary generation logic on Tx and Rx changes with Frame Boundary 

counters width.

Transmitter Nibble Muxing (for Link width modulations) extended from 40-bits to 
80-bits.