Selex Sistemi Integrati Inc. VOR2 User Manual
Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-47
The ~TEST signal when asserted from the LCU via connector P2 will insure the power-OK LED is lighted no
matter the output of the window comparators.
Serial signals (SPORT) from connector P2 program the 32Kx16 static RAM (SRAM) via the U1 programmable
logic device (PLD) with data to be clocked out to the 14-bit D-A converter. The test waveform from the D-A
converter is amplified and buffered before exiting connector P1 and eventually routing to the Monitor CCAs.
The 19.6608MHz oscillator generates the clock for the SRAM and D-A converter as well as the watchdog clock to
the reset supervisor through the PLD. The PLD is also reset when the ~MRESET signal from connector P1 is
asserted. The PLD is factory-programmed via the J3 In-System-Programmed (ISP) connector.
Audio from the Monitor CCAs via connector P1 routes to the J2 audio jack. If headphones are not plugged into the
J2 audio jack, audio is coupled through a transformer and out connector P1 for hook-up on the Control Backplane
Voice terminal block.
Audio to the Audio Generator CCAs comes from either of two sources; the microphone input connector J1 through
connector P1 or Voice terminal block on the Control Backplane.
matter the output of the window comparators.
Serial signals (SPORT) from connector P2 program the 32Kx16 static RAM (SRAM) via the U1 programmable
logic device (PLD) with data to be clocked out to the 14-bit D-A converter. The test waveform from the D-A
converter is amplified and buffered before exiting connector P1 and eventually routing to the Monitor CCAs.
The 19.6608MHz oscillator generates the clock for the SRAM and D-A converter as well as the watchdog clock to
the reset supervisor through the PLD. The PLD is also reset when the ~MRESET signal from connector P1 is
asserted. The PLD is factory-programmed via the J3 In-System-Programmed (ISP) connector.
Audio from the Monitor CCAs via connector P1 routes to the J2 audio jack. If headphones are not plugged into the
J2 audio jack, audio is coupled through a transformer and out connector P1 for hook-up on the Control Backplane
Voice terminal block.
Audio to the Audio Generator CCAs comes from either of two sources; the microphone input connector J1 through
connector P1 or Voice terminal block on the Control Backplane.