Intel P4500 CP80617004803AA Data Sheet
Product codes
CP80617004803AA
Datasheet
83
Signal Description
6.13
Ground and NCTF
6.14
Processor Internal Pull Up/Pull Down
GFX_DPRSLPVR
GPU output signal to Intel MVP6.5 compliant
VR. When asserted this signal indicates that
the GPU is in render suspend mode. This
signal is also used to control render suspend
state exit slew rate.
VR. When asserted this signal indicates that
the GPU is in render suspend mode. This
signal is also used to control render suspend
state exit slew rate.
O
CMOS
GFX_IMON
Current Sense from an Intel MVP6.5
Compliant Regulator to the GPU.
Compliant Regulator to the GPU.
I
A
VDDQ_CK
Filtered power for VDDQ (BGA Only)
Ref
VTT0_DDR
Filtered power for VTT0 (BGA Only)
Ref
VCAP0
VCAP1
VCAP2
Processor Connection to On-board
decoupling capacitors (BGA only)
decoupling capacitors (BGA only)
PWR
Table 6-33.Ground and NCTF
Signal Name
Description
Direction/Buffer
Type
VSS
Processor ground node
GND
VSS_NCTF
Non-Critical to Function: The pins are for
package mechanical reliability.
package mechanical reliability.
DC_TEST_xx#
Daisy Chain Test - These pins are for solder
joint reliability and are non-critical to
function (BGA only).
joint reliability and are non-critical to
function (BGA only).
NC
Table 6-34.Processor Internal Pull Up/Pull Down
Signal Name
Pull Up/Pull Down
Rail
Value
SM_DRAMPWROK
Pull Down
VSS
10 - 20 k
VCCPWRGOOD_0
VCCPWRGOOD_1
Pull Down
VSS
10 - 20 k
VTTPWRGOOD
Pull Down
VSS
10 - 20 k
BPM#[7:0]
Pull Up
VTT
44 - 55 k
TCK
Pull Up
VTT
44 - 55 k
TDI
Pull Up
VTT
44 - 55 k
TMS
Pull Up
VTT
44 - 55 k
TRST#
Pull Up
VTT
1 - 5 k
Table 6-32.Processor Power Signals (Sheet 3 of 3)
Signal Name
Description
Direction/Buffer
Type