Intel i5-2510E FF8062700853304 User Manual

Datasheet

21

The IMC supports the following DDR3 Speed Bin, CAS Write Latency (CWL), and 

command signal mode timings on the main memory interface:

• tCL = CAS Latency
• tRCD = Activate Command to READ or WRITE Command delay
• tRP = PRECHARGE Command Period
• CWL = CAS Write Latency
• Command Signal modes = 1n indicates a new command may be issued every clock 

and 2n indicates a new command may be issued every two clocks. Command 

launch mode programming depends on the transfer rate and memory 

configuration.

NOTES:
1.

System memory timing support is based on availability and is subject to change.

The IMC supports two memory organization modes, single-channel and dual-channel. 

Depending upon how the SO-DIMM Modules are populated in each memory channel, a 

number of different configurations can exist.

In this mode, all memory cycles are directed to a single-channel. Single-channel mode 

is used when either Channel A or Channel B SO-DIMM connectors are populated in any 

order, but not both.

The IMC supports Intel Flex Memory Technology Mode. This mode combines the 

advantages of the Dual-Channel Symmetric (Interleaved) and Dual-Channel 

Asymmetric Modes. Memory is divided into a symmetric and an asymmetric zone. The 

symmetric zone starts at the lowest address in each channel and is contiguous until the 

asymmetric zone begins, or until the top address of the channel with the smaller 

capacity is reached. In this mode, the system runs with one zone of dual-channel mode 

and one zone of single-channel mode, simultaneously, across the whole memory array.

800

6

6

6

5

1n

1

1066

7

7

7

6

1n

1

8

8

8