Intel i5-2520M FF8062700840017 User Manual

Datasheet

65

The integrated graphics and memory controller has two, independent mechanisms that 

cause system memory throttling:

TDP Controller: The TDP Controller is the main mechanism for limiting MCH power by 

limiting memory bandwidth. Utilized as a thermal throttling mechanism, this feature is 

triggered by the Hot temperature trip point of the Graphics and Memory Controller 

digital thermal sensor (DTS) and initiates duty cycle throttling to delay memory 

transactions and thereby reducing MCH power. Power reduction is memory 

configuration and application dependant but duty cycle throttling intervals can be 

customized for maximum throttling efficiency. The TDP Controller can also be used as a 

bandwidth limiter using programmable memory read/write bandwidth thresholds. Intel 

sets the default thresholds that will not restrict bandwidth and performance for most 

applications but these thresholds can be modified to reduce MCH power regardless of 

DTS temperature. 

The TDP controller can be used as a closed loop thermal throttling (CLTT) mechanism or 

an open loop thermal throttling (OLTT) mechanism, although CLTT is recommended

.

• DRAM Thermal Management: Ensures that the DRAM chips are operating within 

thermal limits. The integrated graphics and memory controller can control the 

amount of integrated graphics and memory controller-initiated bandwidth per rank 

to a programmable limit via a weighted input averaging filter.

The integrated graphics and memory controller supports two inputs for external 

thermal sensor notifications, based on which it can regulate memory accesses.

The thermal sensors should be capable of measuring the ambient temperature only and 

should be able to assert PM_EXT_TS#[0] and/or PM_EXT_TS#[1] if the pre-

programmed thermal limits/conditions are met or exceeded.

An external thermal sensor with a serial interface may be placed next to a SO-DIMM (or 

any other appropriate platform location), or a remote Thermal Diode may be placed 

next to the SO-DIMM (or any other appropriate platform location) and connected to the 

external Thermal Sensor.

Additional external thermal sensor's outputs, for multiple sensors, can be wire-OR'd 

together allow signaling from multiple sensors that are physically located separately. 

Software can, if necessary, distinguish which SO-DIMM(s) is the source of the overtemp 

through the serial interface. However, since the SO-DIMM's is located on the same 

Memory Bus Data lines, any integrated graphics and memory controller-based read 

throttle will apply equally.

Thermal sensors can either be directly routed to the integrated graphics and memory 

controller PM_EXT_TS#[0] and PM_EXT_TS#[1] pins or indirectly routed to integrated 

graphics and memory controller by invoking an Embedded Controller (EC) connected in 

between the thermal sensor and integrated graphics and memory controller pins. Both 

routing methods are applicable for both thermal sensors placed on the motherboard 

(TS-on-Board) and/or thermal sensors located on the memory modules (TS-on-DIMM).