Intel i5-2520M FF8062700840017 User Manual

Datasheet

63

Regardless of enabling the automatic or on-demand modes, in the event of a 

catastrophic cooling failure, the processor will automatically shut down when the silicon 

has reached an elevated temperature that risks physical damage to the processor. At 

this point the THERMTRIP# signal will go active. THERMTRIP# activation is independent 

of processor activity and does not generate any bus cycles.

Critical Temperature detection is performed by monitoring the processor temperature 

and temperature gradient. This feature is intended for graceful shutdown before the 

THERMTRIP# is activated. If the processor's Adaptive Thermal Monitor is triggered and 

the temperature remains high, a critical temperature status and sticky bit are latched in 

the thermal status MSR register and also generates a thermal interrupt if enabled. The 

assertion of critical temperature bit indicates that processor can no longer be assumed 

to be working reliably.

The integrated graphics and memory controller provides the following features for 

monitoring the integrated graphics and memory controller temperature and triggering 

thermal management:

• One internal digital thermal sensor.
• Hooks for an external thermal sensor mechanism which can either be TS-on-DIMM 

or TS-on-Board.

The integrated graphics and memory controller has implemented several silicon level 

thermal management features that can lower both integrated graphics and memory 

controller and DDR3 power during periods of high activity. As a result, these features 

can help control temperature and help prevent thermally induced component failures. 

These features include:

• Bandwidth throttling triggered by memory loading.
• Bandwidth throttling triggered by integrated graphics and memory controller 

heating.

• THERMTRIP#  support.
• Render Thermal Throttling

The integrated graphics and memory controller incorporates one on-die digital thermal 

sensor for thermal management. The thermal sensor may be programmed to cause 

hardware throttling and/or software interrupts. Hardware throttling includes render 

thermal throttling and main memory programmable throttling thresholds. Sensor trip 

points may also be programmed to generate various interrupts including SCI, SMI, 

INTR, and SERR. The internal thermal sensor reports six trip points: Aux0, Aux1, Aux2, 

Aux3, Hot, and Catastrophic trip points in order of increasing temperature.

These trip points may be set dynamically if desired and provides a configurable 

interrupt mechanism to allow software to respond when a trip is crossed in either 

direction. These auxiliary temperature trip points do not automatically cause any 

hardware throttling but may be used by software to trigger interrupts.