Intel III Xeon 800 MHz 80526KZ800256 User Manual

Product codes
80526KZ800256
Page of 105
ELECTRICAL SPECIFICATIONS 
 
 
 
30 
 
SCLK
2.46V
0.84V
T
h
T
l
T
r
T
f
T
r
T54
T
f
T55
T52
T
h
T53
T
l
=
=
=
=
2.97V
0.84V
 
SMBUSCLK 
Figure 4.  SMBCLK Clock Waveform 
Clock
Signal
T
x
T
x
T
pw
V
Valid
Valid
T
x
T7, T29 (Valid Delay)
=
T
pw
T14, T15 (Pulse Wdith)
=
V
2/3 V
TT
 for GTL+ signal group; 1V for CMOS, and APIC signal groups
=
 
 
Figure 5. Valid Delay Timings 
Clock
K
Signal
000763z
V Valid
Ts
T8, T27 (Setup Time)
=
Th
T9, T28 (Hold Time)
=
V
2/3 V
TT
 for the GTL+ signal group; 1V for the CMOS, and APIC signal groups
=
T
h
T
s
Vclk
Vclk
1.25V for BCLK, and PICCLK
=
 
Figure 6. Setup and Hold Timings