Intel III Xeon 800 MHz 80526KZ800256 User Manual
Product codes
80526KZ800256
ELECTRICAL SPECIFICATIONS
29
Table 19. SMBus Signal Group, AC Specifications at the Edge Fingers
T# Parameter
Min
Max
Unit Figure
Notes
T50: SMBCLK
Frequency
100
KHz
T51: SMBCLK
Period
10
uS
T52: SMBCLK High Time
4.0
uS
T53: SMBCLK Low Time
4.7
uS
T54: SMBCLK Rise Time
1.0
uS
T55: SMBCLK Fall Time
0.3
uS
T56: SMBus Output Valid Delay
1.0
uS
T57: SMBus Input Setup Time
250
nS
T58: SMBus Input Hold Time
0
nS
T59: Bus
Free
Time
4.7
uS
1
NOTES:
1. Minimum time allowed between request cycles.
Table 20. OCVR Control Signals, AC Specifications at the Edge Fingers
Parameter
Min Max Unit
Notes
OCVR_EN
High
Time
10.0
uS
OCVR_EN Rise Time
10.0
uS
OCVR_EN
Fall
Time
10.0 uS
OCVR_OK
Rise
Time
30.0 nS
1
OCVR_OK Fall Time
10.0
nS
1
NOTES:
1. OCVR_OK output with 5pf load and 10K
Ω external pull-up to 3.3V.
Figure 3 through Figure 10 are to be used in conjunction with the DC specification and AC timings tables.
1.25 V
0.5 V
2.0 V
T
p
T
f
T
r
Clock
T
h
T
l
T5, T25, T34 (Rise Time)
T6, T26, T36 (Fall Time)
T3, T23, T32 (High Time)
T4, T24, T33 (Low Time)
T1, T22, T31 (BCLK, PICCLK, TCK, Period)
T
r
=
T
f
=
T
h
=
T
l
=
T
p
=
P6CB761z
Figure 3. BCLK, PICCLK, TCK Generic Clock Waveform